代码搜索：Data Science
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bld data_part.bld
Release 7.1i ngdbuild H.38
Copyright (c) 1995-2005 Xilinx, Inc. All rights reserved.
Command Line: ngdbuild -intstyle ise -dd d:\2222/_ngo -i -p xc2s100e-tq144-6
data_part.ngc data_part.ngd
Readi
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twr data_part.twr
--------------------------------------------------------------------------------
Release 7.1i Trace H.38
Copyright (c) 1995-2005 Xilinx, Inc. All rights reserved.
D:/Xilinx/bin/nt/trce.exe -ise
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sym data_unite.sym
VERSION 5
BEGIN SYMBOL data_unite
SYMBOLTYPE BLOCK
TIMESTAMP 2008 10 13 3 3 26
SYMPIN 0 -352 Input datain1(1:0)
SYMPIN 0 -288 Input datain2(1:0)
SYMPIN 0 -224 Input datain3(1:0)
SYMPIN 0 -160 I
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par data_unite.par
Release 7.1i par H.38
Copyright (c) 1995-2005 Xilinx, Inc. All rights reserved.
B5A6955F24534CE:: Mon Oct 13 11:02:34 2008
par -w -intstyle ise -ol std -t 1 data_unite_map.ncd data_unite.ncd
data
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ngr data_part.ngr
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mrp data_unite.mrp
Release 7.1i Map H.38
Xilinx Mapping Report File for Design 'data_unite'
Design Information
------------------
Command Line : D:/Xilinx/bin/nt/map.exe -ise d:\2222\2222.ise -intstyle ise -p
xc2s10
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syr data_part.syr
Release 7.1i - xst H.38
Copyright (c) 1995-2005 Xilinx, Inc. All rights reserved.
--> Parameter TMPDIR set to __projnav
CPU : 0.00 / 1.53 s | Elapsed : 0.00 / 1.00 s
--> Parameter xsthdpdir set to
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vhd data_depart.vhd
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
-- Uncomment the following lines to use the declarations that are
-- provided for ins
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vhd data_split.vhd
--------------------------------------------------------------------------------
-- Company:
-- Engineer:
--
-- Create Date: 16:08:51 01/19/06
-- Design Name:
-- Module Name: data_spl