代码搜索：DENG
找到约 879 项符合「DENG」的源代码
代码结果 879
www.eeworm.com/read/277894/10596607
c deng.c
#include
sfr CKCON=0xb6; //定义时钟控制寄存器
sfr IPH=0xb7; //中断器优先级高位
sbit SHANGDIAN_ID1= P1^3;//
sbit STATE_ID2= P1^4;//
sbit STATE_ID3= P1^5;//
sbit STATE_ID4= P1
www.eeworm.com/read/271776/10980751
frm deng.frm
VERSION 5.00
Begin VB.Form deng
Caption = "登入"
ClientHeight = 1395
ClientLeft = 60
ClientTop = 450
ClientWidth = 4380
Icon =
www.eeworm.com/read/470487/6911745
hif deng.hif
HIF003
--
-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, an
www.eeworm.com/read/470487/6911760
acf deng.acf
--
-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any
www.eeworm.com/read/470487/6911777
mmf deng.mmf
www.eeworm.com/read/470487/6911796
vhd deng.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY deng IS
PORT(
CLK:IN STD_LOGIC;
Y:OUT STD_LOGIC_VECTOR(7 DOWNTO 0));
END deng;
ARCHITECT
www.eeworm.com/read/469852/6927993
txt deng.txt
library ieee;
use ieee.std_logic_1164.all;
entity deng is
port(change,control:in std_logic;
light:out std_logic_vector(2 downto 0));
end entity;
architecture behav of deng is
begin
p
www.eeworm.com/read/143576/7098676
wav deng.wav
www.eeworm.com/read/452468/7440748
class deng.class
www.eeworm.com/read/438300/7733175