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找到约 10,000 项符合 Clock 的代码

clock_gen.v

module clock_gen (clock,reset,registersclk,controlerclk,dmemoryclk,ifetchclk,aludecoderclk,aluclk,sigextclk); input clock,reset; output reg registersclk,controlerclk,dmemoryclk,ifetchclk,aludecode

clock_0.v

//Legal Notice: (C)2006 Altera Corporation. All rights reserved. Your //use of Altera Corporation's design tools, logic functions and other //software and tools, and its AMPP partner logic function

clock.rc2

// // clock.RC2 - Microsoft Visual C++ 不会直接编辑的资源 // #ifdef APSTUDIO_INVOKED #error 此文件不能由 Microsoft Visual C++ 编辑 #endif //APSTUDIO_INVOKED ////////////////////////////////////////////////

10000clock.asm

ByteCnt DATA 28H ;I2C总线收发字节计数器 SlvAdr DATA 29H ;从器件地址(控制信息) SubAdr DATA 2AH ;对于32Kbit(4BK)存储容量及以上器件来说,待读写 ;单元地址为两字节,分别存放SubAdr、SubAdr+1单元中

clock.map.rpt

Analysis & Synthesis report for clock Thu Mar 05 19:27:55 2009 Version 6.0 Build 178 04/27/2006 SJ Full Version --------------------- ; Table of Contents ; --------------------- 1. Legal N

clock.asm.rpt

Assembler report for clock Thu Mar 05 19:28:03 2009 Version 6.0 Build 178 04/27/2006 SJ Full Version --------------------- ; Table of Contents ; --------------------- 1. Legal Notice 2.

clock.fit.rpt

Fitter report for clock Thu Mar 05 19:28:00 2009 Version 6.0 Build 178 04/27/2006 SJ Full Version --------------------- ; Table of Contents ; --------------------- 1. Legal Notice 2. Fi