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Clock 的代码
clock_1.hif
Version 7.0 Build 33 02/05/2007 SJ Full Version
11
807
OFF
OFF
OFF
OFF
OFF
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
-- Start Library Paths --
--
clock_1.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity clock_1 is
port(clk:in std_logic;----时钟输入 1khz
clr:in std_logic;----清零
en:in std_logic;-----暂停
digital clock (2).opt
### uVision2 Project, (C) Keil Software
### Do not modify !
cExt (*.c)
aExt (*.s*; *.src; *.a*)
oExt (*.obj)
lExt (*.lib)
tExt (*.txt; *.h; *.inc)
pExt (*.plm)
CppX (*.cpp)
DaveTm {
digital clock (2).plg
礦ision3 Build Log
Project:
F:\Proteus书稿\MCS-51 Demonstration\Chapter 8\62 Digital Clock (2)\Digital Clock (2).uv2
Project File Date: 08/04/2006
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