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design rule check - dsp引脚接出.drc
Protel Design System Design Rule Check
PCB File : C:\Documents and Settings\Administrator\桌面\电路板\DSP引脚\DSP引脚接出.PcbDoc
Date : 2010-4-8
Time : 11:34:34
Processing Rule : Short-Circuit Cons
chuacirc.m
function dy=ChuaCirc(t,y,flag,rParam)
%Chua's autonomous circuit
%y0=[1 0.2 0];
%parameters
alpha=rParam;%10
beta=15;
a=-1.3;
b=-0.7;
%nonlinearity
nonlin=b*y(1)+0.5*(a-b)*(abs(y(1)+1)-ab
digital_models.deck
Digital models
*
* This circuit contains a nand gate oscillator enabled by
* a pulse input after 20nS. Node 1 is an analog node.
* Nodes 2 and 3 are digital nodes.
*
.tran 1e-8 1e-7
*
v1 1 0
speech.ewb
Electronics Workbench Circuit File
Version: 5
Charset: ANSI
Description:
"Band-Pass Filter 300Hz to 3KHz or Speech Filter"
EncryptionType: 2
UsingVectorGraphics: 0
/000@D0I0?4D
e_ckt27_3.htm.mht
From:
Subject: Circuit explanation of +30V power supply
Date: Fri Oct 05 2007 19:00:18 GMT+0800
MIME-Version: 1.0
Content-Location: http://www.interq.or.jp/
speech.ewb
Electronics Workbench Circuit File
Version: 5
Charset: ANSI
Description:
"Band-Pass Filter 300Hz to 3KHz or Speech Filter"
EncryptionType: 2
UsingVectorGraphics: 0
/000@D0I0?4D
ibm1.out
Circuit: ************ Multiconductor 6-line with ECL drivers *******
Warning -- Level not specified on line "bf=150 vaf=20v is=4e-17 rb=300 rc=100 cje=30ff cjc=30ff cjs=40ff vje=0.6
mp3电路设计.drc
Protel Design System Design Rule Check
PCB File : \Documents and Settings\liujiang\桌面\MP3电路\MP3电路设计.PCBDOC
Date : 2006-4-24
Time : 15:43:57
Processing Rule : Short-Circuit Constraint (Al
5.07 图5-26 共源放大电路.ewb
Electronics Workbench Circuit File
Version: 5
Charset: ANSI
Description:
"gm=2mA , Threshold voltage= - 0.9"
EncryptionType: 2
UsingVectorGraphics: 0
/000@D0I0?4D
power vco w dt.cir
** Profile: "Power VCO w DT-Power VCO w DT" [ D:\Christophe\Livres\Spice simus 2\OrCAD book distribution\Chapitre4\chapter 4-pspicefiles\power vco w dt\power vco w dt.sim ]
** Creating circuit fi