代码搜索结果

Field=Designator,String,Designator,100|Field=Comment,String,Comment,100|Field=Footprint,String,Footprint,100|Field=Value,String,Value,100|Field=LibRef,String,LibRef,100|Field=Description,String,Descri

clear clc close t0=0; tfinal=15; x0=[0.5;0]; %初始化，电感电流为0，电容电压为0.5v %tol=0.001; %数值计算精度 [t,x]=ode45('elecsys',t0,tfinal,x0); %elecsys是系统微分方程的描述函数 figure(1) subplot(211) plot(t,x(:,1)) title

AVR JTAG programmer-debugger Bill of materials Designator LibRef Description Footprint Comment Bolt K骴 C1 CAPSMD

% % This program generates an impedance transformation % plot in the Smith Chart and finds the input impedance of the % matching network as a function of the shunt capacitance position %

Field=Designator,String,Designator,100|Field=LibRef,String,LibRef,100|Field=Description,String,Description,100|Field=Footprint,String,Footprint,100|Field=Comment,String,Comment,100 C1|Cap Semi|Capaci

;**** A P P L I C A T I O N N O T E A V R 4 0 0 ************************ ;* ;* Title: Low Cost A/D Converter ;* Version: 1.0 ;* Last updated: 97.07.18 ;* Target: AT90Sxxxx (All AVR Device

; MSP430xG439 software ADC demo ; ; Description: This codes generates a PWM signal, and adjusts its ratio until a heavily low pass ; filtered version of the signal (i.e. its equival

clear clc close t0=0; tfinal=15; x0=[0.5;0]; %初始化，电感电流为0，电容电压为0.5v %tol=0.001; %数值计算精度 [t,x]=ode45('elecsys',t0,tfinal,x0); %elecsys是系统微分方程的描述函数 figure(1) subplot(211) plot(t,x(:,1)) title