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Buck 的代码
test buck cycle-cycle vm.cir
** Profile: "test buck cycle-by-cycle VM-test buck cycle-cycle VM" [ D:\Christophe\Livres\Spice simus 2\OrCAD book distribution\Chapitre2\chapter2_1\chapter 2_1-pspicefiles\test buck cycle-by-cycle v
test buck cycle-cycle vm.prb
[DISPLAYS]
BEGIN DISPLAY LAST SESSION
ANALYSIS TRANSIENT_ANALYSIS
SYMBOL ALWAYS
TRACECOLORSCHEME NORMAL
BEGIN ANAPLOT 1
ACTIVE
XBASE
BEGIN XAXIS
XAXISUSERNAME 0 (null)
RANGEFLAG AUTO
TYPE L
test buck cycle-cycle vm.out
**** 06/05/07 17:12:10 ******* PSpice 10.3.0 (Jan 2004) ******* ID# 1111111111
** Profile: "test buck cycle-by-cycle VM-test buck cycle-cycle VM" [ D:\Christophe\Livres\Spice simus 2\OrCAD book
test buck cycle-by-cycle vm.net
* source CHAPTER 2_1
L_L1 VOUT N716813 75u
V_V7 N716967 0 {R2}
R_Resr N716523 VOUT 10m
V_Vref N716571 0 2.5
R_R31 N717015 0 1k
X_U10 N716
test buck cycle-cycle vm.sim
@OrCAD Simulation Server Version: 1.0
@Settings: 0 1
@General:
ProfileName= "test buck cycle-cycle VM"
ProfileFile= "test buck cycle-cycle vm.sim"
Connectivity= "test buck cycle-by-cycle VM.n
test buck cycleby-cycle cm.sim
@OrCAD Simulation Server Version: 1.0
@Settings: 0 1
@General:
ProfileName= "test buck cycleby-cycle CM"
ProfileFile= "test buck cycleby-cycle cm.sim"
Connectivity= "test buck cycle-by-cycle
test buck cycle-by-cycle cm.als
.ALIASES
X_U13 U13(1=RESET 2=N851707 3=R ) CN @CHAPTER 2_1.test buck cycle-by-cycle
+CM(sch_1):INS852889@APPLICATION.OR2.Normal(chips)
V_Vclock Vclock(+=S -=0 ) CN @CHAPTER 2_1.t
test buck cycleby-cycle cm.out
**** 06/05/07 17:08:39 ******* PSpice 10.3.0 (Jan 2004) ******* ID# 1111111111
** Profile: "test buck cycle-by-cycle CM-test buck cycleby-cycle CM" [ D:\Christophe\Livres\Spice simus 2\OrCAD bo