📄 test buck cycle-by-cycle cm.als
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.ALIASES
X_U13 U13(1=RESET 2=N851707 3=R ) CN @CHAPTER 2_1.test buck cycle-by-cycle
+CM(sch_1):INS852889@APPLICATION.OR2.Normal(chips)
V_Vclock Vclock(+=S -=0 ) CN @CHAPTER 2_1.test buck cycle-by-cycle CM(sch_1):INS852409@SOURCE.VPULSE.Normal(chips)
R_R29 R29(1=LEB 2=Q ) CN @CHAPTER 2_1.test buck cycle-by-cycle CM(sch_1):INS852663@ANALOG.R.Normal(chips)
X_U14 U14(NINV=ICOIL INV=ERR OUT=N851707 ) CN @CHAPTER 2_1.test buck cycle-by-cycle
+CM(sch_1):INS866157@APPLICATION.COMPARHYS.Normal(chips)
V_Vref Vref(+=N820160 -=0 ) CN @CHAPTER 2_1.test buck cycle-by-cycle CM(sch_1):INS852915@SOURCE.VDC.Normal(chips)
X_U10 U10(1=N820160 5=N820022 7=ERR ) CN @CHAPTER 2_1.test buck cycle-by-cycle
+CM(sch_1):INS852451@APPLICATION.AMPSIMP.Normal(chips)
R_R5 R5(1=N8527591 2=N8527931 ) CN @CHAPTER 2_1.test buck cycle-by-cycle CM(sch_1):INS852935@ANALOG.R.Normal(chips)
R_Rlower Rlower(1=0 2=N820022 ) CN @CHAPTER 2_1.test buck cycle-by-cycle CM(sch_1):INS852707@ANALOG.R.Normal(chips)
R_R2 R2(1=N8528671 2=N820022 ) CN @CHAPTER 2_1.test buck cycle-by-cycle CM(sch_1):INS852955@ANALOG.R.Normal(chips)
V_Vin Vin(+=N822282 -=0 ) CN @CHAPTER 2_1.test buck cycle-by-cycle CM(sch_1):INS852485@SOURCE.VDC.Normal(chips)
R_Resr Resr(1=N820112 2=VOUT ) CN @CHAPTER 2_1.test buck cycle-by-cycle CM(sch_1):INS852727@ANALOG.R.Normal(chips)
V_V8 V8(+=N820788 -=0 ) CN @CHAPTER 2_1.test buck cycle-by-cycle CM(sch_1):INS852975@SOURCE.VDC.Normal(chips)
R_R26 R26(1=N820776 2=0 ) CN @CHAPTER 2_1.test buck cycle-by-cycle CM(sch_1):INS852505@ANALOG.R.Normal(chips)
V_VL VL(+=N821460 -=N8527591 ) CN @CHAPTER 2_1.test buck cycle-by-cycle CM(sch_1):INS852747@SOURCE.VAC.Normal(chips)
R_R22 R22(1=N820788 2=0 ) CN @CHAPTER 2_1.test buck cycle-by-cycle CM(sch_1):INS852269@ANALOG.R.Normal(chips)
G_G1 G1(OUT+=0 OUT-=ICOIL ) CN @CHAPTER 2_1.test buck cycle-by-cycle CM(sch_1):INS852997@ABM.GVALUE.Normal(chips)
R_R25 R25(1=N820782 2=0 ) CN @CHAPTER 2_1.test buck cycle-by-cycle CM(sch_1):INS852525@ANALOG.R.Normal(chips)
C_C2 C2(1=ERR 2=N820022 ) CN @CHAPTER 2_1.test buck cycle-by-cycle CM(sch_1):INS852767@ANALOG.C.Normal(chips)
L_L1 L1(1=VOUT 2=N8527931 ) CN @CHAPTER 2_1.test buck cycle-by-cycle CM(sch_1):INS852783@ANALOG.L.Normal(chips)
R_R27 R27(1=0 2=N823845 ) CN @CHAPTER 2_1.test buck cycle-by-cycle CM(sch_1):INS852547@ANALOG.R.Normal(chips)
V_V7 V7(+=N820776 -=0 ) CN @CHAPTER 2_1.test buck cycle-by-cycle CM(sch_1):INS852311@SOURCE.VDC.Normal(chips)
V_Vreset Vreset(+=RESET -=0 ) CN @CHAPTER 2_1.test buck cycle-by-cycle CM(sch_1):INS853025@SOURCE.VPULSE.Normal(chips)
V_V9 V9(+=N820782 -=0 ) CN @CHAPTER 2_1.test buck cycle-by-cycle CM(sch_1):INS852803@SOURCE.VDC.Normal(chips)
X_U11 U11(6=S 8=R 2=Q 1=N823845 ) CN @CHAPTER 2_1.test buck cycle-by-cycle
+CM(sch_1):INS852563@APPLICATION.FFLOP.Normal(chips)
R_Rupper Rupper(1=N820022 2=VOUT ) CN @CHAPTER 2_1.test buck cycle-by-cycle CM(sch_1):INS852331@ANALOG.R.Normal(chips)
C_C3 C3(1=0 2=LEB ) CN @CHAPTER 2_1.test buck cycle-by-cycle CM(sch_1):INS852825@ANALOG.C.Normal(chips)
D_D2 D2(1=LEB 2=Q ) CN @CHAPTER 2_1.test buck cycle-by-cycle CM(sch_1):INS852593@DIODE.D1N4148.Normal(chips)
V_V13 V13(+=N820374 -=0 ) CN @CHAPTER 2_1.test buck cycle-by-cycle CM(sch_1):INS852841@SOURCE.VPWL.Normal(chips)
R_R28 R28(1=0 2=ICOIL ) CN @CHAPTER 2_1.test buck cycle-by-cycle CM(sch_1):INS852613@ANALOG.R.Normal(chips)
D_D3 D3(1=0 2=N821460 ) CN @CHAPTER 2_1.test buck cycle-by-cycle CM(sch_1):INS863942@DIODE.D1N5822.Normal(chips)
C_C1 C1(1=ERR 2=N8528671 ) CN @CHAPTER 2_1.test buck cycle-by-cycle CM(sch_1):INS852857@ANALOG.C.Normal(chips)
X_S1 S1(1=N820374 2=0 3=VOUT 4=0 ) CN @CHAPTER 2_1.test buck cycle-by-cycle CM(sch_1):INS852379@BREAKOUT.Sbreak.Normal(chips)
C_Cout Cout(1=0 2=N820112 ) CN @CHAPTER 2_1.test buck cycle-by-cycle CM(sch_1):INS852873@ANALOG.C.Normal(chips)
X_S2 S2(1=Q 2=0 3=N822282 4=N821460 ) CN @CHAPTER 2_1.test buck cycle-by-cycle CM(sch_1):INS852633@BREAKOUT.Sbreak.Normal(chips)
_ _(vout=VOUT)
_ _(Q=Q)
_ _(err=ERR)
_ _(reset=RESET)
_ _(LEB=LEB)
_ _(R=R)
_ _(S=S)
_ _(Icoil=ICOIL)
.ENDALIASES
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