代码搜索：Booth
找到约 978 项符合「Booth」的源代码
代码结果 978
www.eeworm.com/read/149364/12385835
psp booth_multiplier.psp
www.eeworm.com/read/149364/12385852
pin booth_multiplier.pin
-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions,
www.eeworm.com/read/149364/12385855
vhd booth_multiplier.vhd
--实验6 Booth乘法器
LIBRARY IEEE;
USE IEEE.Std_logic_1164.ALL;
ENTITY booth_multiplier IS
GENERIC(k : POSITIVE := 3); --input number word length less one
PORT( multiplicand : IN BIT_VEC
www.eeworm.com/read/225948/14509994
v testbench_booth.v
/////////////////////////////////////////////////////////////
// Verilog Test Bench v2.0, 3-29-2000 //
// ECE 371 EMR, Spring 2000 //
// By Steve B
www.eeworm.com/read/225948/14510057
out test_booth.out
Multiplier Test Log
___________________
Test# 1 run without incident.
================
Multiplier_A=00000020 Multiplier_B=00000100 Multiplier_Result=00002000 Expected_Result=00002000
========
www.eeworm.com/read/18310/783767
v booth_code.v
module booth_code(b,x,out);
input[2:0] b;
input[8:0] x;
output[9:0] out;
reg[9:0] out;
wire[8:0] temp;
wire[8:0] x_fan;
assign x_fan=~x;
wire co;
add_8b add8_1(x_fan[7:0],1,0,temp,co);
always @(b or
www.eeworm.com/read/18310/783871
bak booth.v.bak
www.eeworm.com/read/18310/783874
v booth_tp.v
`timescale 1ns/1ns
module booth_tp();
wire[2:0] b0,b1,b2,b3;
reg[7:0] h;
booth inst_cnt(h,b0,b1,b2,b3);
initial
begin
h=8'b00000000;
#10 h=8'b11111100;
#10 h=8'b00000010;
#10 h=8'b00000
www.eeworm.com/read/31975/1030349
v booth_mul.v
//---------------------------------------
// Lib : boothmul
// Unit : Booth_Mul
//---------------------------------------
module Booth_Mul(M, Q, contrl, Ready, A);
input [31:0] M;
input [31:0] Q