booth_tp.v

fpga功能实现有限字长响应FIR

`timescale 1ns/1ns
module booth_tp();
wire[2:0] b0,b1,b2,b3;
reg[7:0] h;
booth  inst_cnt(h,b0,b1,b2,b3);
initial 
 begin
      h=8'b00000000;
#10   h=8'b11111100;
#10   h=8'b00000010;
#10   h=8'b00000101;
#10   h=8'b11111111;
#10   h=8'b11110010;
#10   h=8'b01001100;
#10  $stop;
end
endmodule