代码搜索：Async
找到约 3,194 项符合「Async」的源代码
代码结果 3,194
www.eeworm.com/read/325411/13207452
bat creasync.bat
@echo off
rem Creates all ASYNC modules and updates ASYNCx.LIB.
:begin
if *%1==*t goto good
if *%1==*s goto good
if *%1==*c goto good
if *%1==*m goto good
if *%1==*l goto good
if *%1==*h goto
www.eeworm.com/read/152814/5666628
todo
enhance make test
implement v2 traps and v3 inform requests.
solidify/enhance the V3 api
handle TCP sessions
See that informative strings are returned and the the error number is
useful in all cas
www.eeworm.com/read/137691/5820949
nc hplcc2420.nc
// $Id: HPLCC2420.nc,v 1.4 2004/09/19 23:44:27 jpolastre Exp $
/* tab:4
* "Copyright (c) 2000-2003 The Regents of the University of California.
* All rights reserved.
*
* Permission to
www.eeworm.com/read/137691/5821616
nc msp430compare.nc
//$Id: MSP430Compare.nc,v 1.4 2004/08/18 01:39:05 jpolastre Exp $
/* "Copyright (c) 2000-2003 The Regents of the University of California.
* All rights reserved.
*
* Permission to use, copy, mod
www.eeworm.com/read/137691/5821670
nc msp430generalio.nc
// $Id: MSP430GeneralIO.nc,v 1.3 2004/11/08 00:09:47 cssharp Exp $
/* "Copyright (c) 2000-2003 The Regents of the University of California.
* All rights reserved.
*
* Permission to use, copy, mo
www.eeworm.com/read/111925/15500517
bat creasync.bat
@echo off
rem Creates all ASYNC modules and updates ASYNCx.LIB.
:begin
if *%1==*t goto good
if *%1==*s goto good
if *%1==*c goto good
if *%1==*m goto good
if *%1==*l goto good
if *%1==*h goto
www.eeworm.com/read/106891/15618525
h inetaddr.h
/* GNet - Networking library
* Copyright (C) 2000, 2002 David Helder
* Copyright (C) 2000 Andrew Lanoix
*
* This library is free software; you can redistribute it and/or
* modify it under the t
www.eeworm.com/read/163678/10150649
cpp main.cpp
//BEGIN main.cpp (systemc)
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
#include "async_mem.h"
int sc_main(int argc, char* argv[]) {
async_mem async_mem_i("async
www.eeworm.com/read/276507/10733464
sap dds.sap
n work dds verilog;
gi addr_acc[0];
ai .clock "NONE";
ai .clock_edge "rise";
ai .async_reset "n:un1_addr_acc6_4";
ai .async_set "n:un1_addr_acc6_7";
gp C;
ap .is_clock 1;
ap .clock "NONE";
www.eeworm.com/read/478461/6717865
vhd vio_xst_example.vhd
library IEEE;
use IEEE.std_logic_1164.all;
entity vio_xst_example is
end vio_xst_example;
architecture structure of vio_xst_example is
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