代码搜索：Array Signal Processing
找到约 10,000 项符合「Array Signal Processing」的源代码
代码结果 10,000
www.eeworm.com/read/345596/11804268
signal_generator
www.eeworm.com/read/258485/11859539
c signal.c
/*fosc=12MHz,要求P2.0输出T=2ms的方波.*/
/*使用查询方式*/
#include
void signal(void)
{TMOD=0X01;TR0=1;
for(;;)
{TH0=-1000/256;
TL0=-1000%256;
do{}while(!TF0);//等待T0溢出
P2_0=!P2_0;
TF0
www.eeworm.com/read/344672/11869045
ini signal.ini
signal void Toggle(void)
{
PORT0 = (PORT0 ^ 0x4000);
twatch (200);
PORT0 = (PORT0 ^ 0x4000);
}
KILL BUTTON *
DEFINE BUTTON "Generate EINT 1","Toggle()"
www.eeworm.com/read/344672/11869081
ini signal.ini
signal void Toggle(void)
{
PORT0 = (PORT0 ^ 0x4000);
twatch (200);
PORT0 = (PORT0 ^ 0x4000);
}
KILL BUTTON *
DEFINE BUTTON "Generate EINT 1","Toggle()"
www.eeworm.com/read/344672/11869168
ini signal.ini
signal void Toggle(void)
{
PORT0 = (PORT0 ^ 0x4000);
twatch (200);
PORT0 = (PORT0 ^ 0x4000);
}
KILL BUTTON *
DEFINE BUTTON "Generate EINT 1","Toggle()"
www.eeworm.com/read/258225/11875153
h signal.h
/* signal.h
Definitions for ANSI defined signaling capability
Copyright (c) 1988, 1992 by Borland International
All Rights Reserved.
*/
#ifndef __SIGNAL_H
#define __SIGNAL_H
www.eeworm.com/read/155382/11881530
v signal.v
/*-----------------------------------------------*-
File for signal sourse
-*-----------------------------------------------*/
module signal(reset,clk,step_value,phase_addr1,phase_addr2);
input
www.eeworm.com/read/155382/11881536
plg signal.plg
礦ision2 Build Log
Project:
F:\cpld\orthogo signal\programme\MCU\signal.uv2
Project File Date: 10/05/2004
Output:
www.eeworm.com/read/155382/11881547
hex signal.hex
:03000000020003F8
:0C000300787FE4F6D8FD75810702000F3D
:04000F0075A0F022C6
:00000001FF
www.eeworm.com/read/155382/11881572
opt signal.opt
### uVision2 Project, (C) Keil Software
### Do not modify !
cExt (*.c)
aExt (*.s*; *.src; *.a*)
oExt (*.obj)
lExt (*.lib)
tExt (*.txt; *.h; *.inc)
pExt (*.plm)
CppX (*.cpp)
DaveTm {