代码搜索：1Hz
找到约 197 项符合「1Hz」的源代码
代码结果 197
www.eeworm.com/read/27266/981930
c 频率计.c
/*******************************************************
频率计，可测量1HZ~65KHZ的频率,晶振频率为11.0592MHZ
********************************************************/
#include
unsigned int n=0;
unsign
www.eeworm.com/read/168078/9940366
v my_division.v
// **********************************************************************************
// FileName : my_division.v
//
// Discription :调用通用分频器,将30MHZ分频成1000Hz,100HZ,5HZ,1HZ
//
// Date :
//
// Author
www.eeworm.com/read/439816/7701166
vhd testctl.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY TESTCTL IS
PORT (CLK : IN STD_LOGIC; -- 1Hz
TSTEN : OUT STD_LOGIC; --
www.eeworm.com/read/326024/13169860
vhd testctl.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY TESTCTL IS
PORT (CLK : IN STD_LOGIC; -- 1Hz
TSTEN : OUT STD_LOGIC; --
www.eeworm.com/read/493793/6390984
vhd testctl.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY TESTCTL IS
PORT (CLK : IN STD_LOGIC; -- 1Hz
TSTEN : OUT STD_LOGIC; --
www.eeworm.com/read/156108/11827064
vhd testctl.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY TESTCTL IS
PORT (CLK : IN STD_LOGIC; -- 1Hz
TSTEN : OUT STD_LOGIC; --
www.eeworm.com/read/255039/12104542
vhd testctl.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY TESTCTL IS
PORT (CLK : IN STD_LOGIC; -- 1Hz
TSTEN : OUT STD_LOGIC; --
www.eeworm.com/read/255034/12104987
vhd testctl.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY TESTCTL IS
PORT (CLK : IN STD_LOGIC; -- 1Hz
TSTEN : OUT STD_LOGIC; --
www.eeworm.com/read/255023/12105690
vhd testctl.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY TESTCTL IS
PORT (CLK : IN STD_LOGIC; -- 1Hz
TSTEN : OUT STD_LOGIC; --
www.eeworm.com/read/223125/14655535
vhd fen1.vhd
-------------------------------------------------
--实体名：fen1
--功 能：对输入时钟进行40000000分频，得到1Hz信号
--接 口：clk -时钟输入
-- qout-秒输出信号
-------------------------------------------------
librar