代码搜索：时钟提取
找到约 10,000 项符合「时钟提取」的源代码
代码结果 10,000
www.eeworm.com/read/244166/12879928
vhd dac2adc.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY DAC2ADC IS
PORT ( CLK : IN STD_LOGIC; --计数器时钟
LM311 : IN STD_LOGIC; --LM311输出，由PIO37口进入FPG
www.eeworm.com/read/329795/12932813
vhd jp4x4.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity jp4x4 is
port(clk:in std_logic; --扫描时钟信号
start:in std_logic; --开始信号，高电平有效
kbcol:in std_logic_vector(3 dow
www.eeworm.com/read/329795/12932817
bak jp4x4.vhd.bak
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity jp4x4 is
port(clk:in std_logic; --扫描时钟信号
start:in std_logic; --开始信号，高电平有效
kbcol:in std_logic_vector(3 dow
www.eeworm.com/read/329794/12933175
vhd jiao_tong.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all; -- 用于数据类型转换
entity jiao_tong is
port(clk:in std_logic; -- 20MHz晶振时钟
jin:in std_logi
www.eeworm.com/read/329794/12933416
bak jiao_tong.vhd.bak
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all; -- 用于数据类型转换
entity jiao_tong is
port(clk:in std_logic; -- 20MHz晶振时钟
jin:in std_logi
www.eeworm.com/read/326769/13118032
c 8-isd4004.c
#include
sbit SS=P1^0; //片选
sbit SCLK=P1^1; //ISD4004时钟
sbit MOSI=P1^2; //数据输入
sbit MISO=P1^3; //数据输出
sbit LED=P1^7;
www.eeworm.com/read/138347/13240228
c rtc.c
/******************************************/
/* 目标MCU:MEGA8 晶振:内部RC(INT) 8MHZ */
/******************************************/
//说明：ATMEGA8只有在使用内部RC振荡器，T2使用异步时钟的
// 情况下，外接的32.768KHZ的晶振才
www.eeworm.com/read/138347/13240241
_c rtc._c
/******************************************/
/* 目标MCU:MEGA8 晶振:内部RC(INT) 8MHZ */
/******************************************/
//说明：ATMEGA8只有在使用内部RC振荡器，T2使用异步时钟的
// 情况下，外接的32.768KHZ的晶振才
www.eeworm.com/read/320546/13424360
vhd dac2adc.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY DAC2ADC IS
PORT ( CLK : IN STD_LOGIC; --计数器时钟
LM311 : IN STD_LOGIC; --LM311输出，由PIO37口进入FPG
www.eeworm.com/read/320258/13429731
c ri-r6c-001a.c
#include
#define SCLOCK _pa3
#define CCLOCK _13_3 //时钟控制权的设置
#define M_ERR _pa2
#define DIN _pa1
#define DOUT _pa0
#define LED _pc0
#define HTTX