代码搜索：废墨清零
找到约 859 项符合「废墨清零」的源代码
代码结果 859
www.eeworm.com/read/282462/9092586
vhd minsecondaa.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity MINSECOND is
port(clk,clr:in std_logic;----时钟/清零信号
sec1,sec0:out std_logic_vector(3 downto 0);----秒高位/低位
www.eeworm.com/read/282462/9092589
vhd second.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity SECOND is
port(clk,clr:in std_logic;----时钟/清零信号
sec1,sec0:out std_logic_vector(3 downto 0);----秒高位/低位
www.eeworm.com/read/373538/9450877
vhd second.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY SECOND IS
PORT(CLK,RESET:IN STD_LOGIC;----时钟/清零信号
SECOND0,SECOND1:OUT STD_LOGIC_VECTOR(3 DOWNTO 0);----秒高位/
www.eeworm.com/read/455332/7373243
vhd minsecondaa.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity MINSECOND is
port(clk,clr:in std_logic;----时钟/清零信号
sec1,sec0:out std_logic_vector(3 downto 0);----秒高位/低位
www.eeworm.com/read/455332/7373244
vhd second.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity SECOND is
port(clk,clr:in std_logic;----时钟/清零信号
sec1,sec0:out std_logic_vector(3 downto 0);----秒高位/低位
www.eeworm.com/read/448916/7522447
vhd procontrol.vhd
library ieee;
use ieee.std_logic_1164.all;
entity procontrol is
port(clk:in std_logic; --1hz的测频率控制时钟
en:out std_logic; --计数使能端
load:out std_logic; --计数器清零
clr:ou
www.eeworm.com/read/329792/12933516
vhd clock_6.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity clock_6 is
port(clk:in std_logic; --时钟输入20MHz
clr:in std_logic; --清零端
en:in std_logic; --暂停信号
m
www.eeworm.com/read/329792/12933717
bak clock_6.vhd.bak
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity clock_6 is
port(clk:in std_logic; --时钟输入20MHz
clr:in std_logic; --清零端
en:in std_logic; --暂停信号
m
www.eeworm.com/read/241514/13138137
txt 周.txt
ORG 0000H
LJMP START
CLEARMEMIO:MOV A,#0FFH ;复位
MOV P3,A
CLR A
MOV R0,#70H ；将70H-73H清零
MOV R2,#04H
LOOPMEM:MOV @R0,A
www.eeworm.com/read/406844/11434611
vhd minsecondaa.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity MINSECOND is
port(clk,clr:in std_logic;----时钟/清零信号
sec1,sec0:out std_logic_vector(3 downto 0);----秒高位/低位