代码搜索:如何学习 Fir?

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vwf fir.vwf

/* WARNING: Do NOT edit the input and output ports in this file in a text editor if you plan to continue editing the block that represents it in the Block Editor! File corruption is VERY likely to
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vhd fir.vhd

--------------------------------------------------------------- -- FIR Digital Filter Design (DSP example) -- tested by Weijun Zhang, 04/2001 -- -- VHDL Data-Flow modeling -- KEYWORD: -- generate, a
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qsf fir.qsf

# Copyright (C) 1991-2004 Altera Corporation # Any megafunction design, and related netlist (encrypted or decrypted), # support information, device programming or simulation file, and any oth
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qpf fir.qpf

# Copyright (C) 1991-2004 Altera Corporation # Any megafunction design, and related netlist (encrypted or decrypted), # support information, device programming or simulation file, and any oth
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vhd fir.vhd

Library IEEE; use IEEE.std_logic_1164.all; use IEEE.std_logic_arith.all; use work.SIGNED_ARITH.all; use work.coeffs.all; entity fir is port(clk,reset: in std_logic; sample: in signed (
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pjt fir.pjt

; Code Composer Project File, Version 2.0 (do not modify or remove this line) [Project Settings] ProjectDir="D:\newdone\c6713Ae(3.1)\Lab0501-FIR\" ProjectType=Executable CPUFamily=TMS320C67XX T
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wks fir.wks

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paf fir.paf

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c fir.c

#include #define FIRNUMBER 25 #define SIGNAL1F 1000 #define SIGNAL2F 4500 #define SAMPLEF 10000 #define PI 3.1415926 float InputWave(); float FIR(); float fHn[FIRNUMBER]={ 0.0,0
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pjt fir.pjt

; Code Composer Project File, Version 2.0 (do not modify or remove this line) [Project Settings] ProjectDir="D:\CCStudio_v3.1\MyProjects\fir\" ProjectType=Executable CPUFamily=TMS320C28XX Tool=