代码搜索:低功耗CMOS

找到约 2,363 项符合「低功耗CMOS」的源代码

代码结果 2,363
www.eeworm.com/read/376085/9332684

sp fig33_72.sp

* Figure 33.72 CMOS: Mixed-Signal Circuit Design * Vdd Vdd 0 DC 1.5 Vinp Vinp 0 DC 0.75 AC 1 *Vinm Vinm 0 DC 0.75 *.DC Vinp 0.74 0.76 1u RF Vout Vinm 100MEG CF Vinm 0 1 .AC dec 100 100 1G .o
www.eeworm.com/read/376085/9332695

sp fig33_25.sp

* Figure 33.25 CMOS: Mixed-Signal Circuit Design * *#destroy all *#run *#plot Vout Vin M1 Vout Vin 0 0 nmos W=10 L=1 CL Vout 0 1pF .IC v(vout)=1.5 Vin Vin 0 DC 0 PULSE 0 1.5 2n .1n .t
www.eeworm.com/read/376085/9332705

sp fig33_73.sp

* Figure 33.73 CMOS: Mixed-Signal Circuit Design * Vdd Vdd 0 DC 1.5 Vinp Vinp 0 DC 0.75 AC 1 *Vinm Vinm 0 DC 0.75 *.DC Vinp 0.74 0.76 1u RF Vout Vinm 100MEG CF Vinm 0 1 .AC dec 100 100 1G .o
www.eeworm.com/read/492122/6424280

sp nmos_id_vds_13u.sp

*** NMOS ID_VDS for Various Vgs CMOS: 0.13um *** .options list node post .option scale=0.13u .op .include '13u.l' .dc VDS .01 1.8 1m VGS 0 1 100m VDS D 0 DC 1.8 VGS G 0 DC .5 .param L
www.eeworm.com/read/492122/6424281

sp pmos_id_vgs_18u.sp

pMOS ID_VGS for Various Vsb CMOS: 0.18um .options list node post .option scale=0.18u .op .include '18u.l' .dc VSG 0 1.8 1m VBS .5 -.5 200m VSD S 0 DC 1.8 VSG S G DC 0.9 VBS S B
www.eeworm.com/read/492124/6424289

sp pmos_id_vsb_18u.sp

PMOS ID_VGS for Various Vsb CMOS: 0.18um .options list node post .option scale=0.18u .op .include '18u.l' .dc VSB 0 .5 1m VSD S 0 DC 1.9 VSG S G DC .8 VSB S B DC 0 .param L=1
www.eeworm.com/read/492125/6424294

sp layout sp with level3.sp

CIRCUIT example * * IC Technology: CMOS 0.12祄 - 6 Metal * .op .dc iref .1u 220u .1u VDD 1 0 DC 1.20 ibias 1 7 DC 200u iref 1 6 DC 200u vo 2 0 DC .3 * * List of nodes * "N2" corresponds to
www.eeworm.com/read/376085/9332671

sp fig33_21a.sp

* Figure 33.21a CMOS: Mixed-Signal Circuit Design * M1 Vd Vg Vs Vb pmos W=20 L=1 Vg 0 Vg DC 0 Vs 0 Vs DC 0 Vd 0 Vd DC 1.5 Vb Vb 0 DC 0 .DC Vd 0 1.51 0.05 Vg 0.5 1.5 0.25 .options s
www.eeworm.com/read/376085/9332679

sp fig33_20a.sp

* Figure 33.20a CMOS: Mixed-Signal Circuit Design * M1 Vd Vg Vs Vb nmos W=10 L=1 Vg Vg 0 DC 0 Vs Vs 0 DC 0 Vd Vd 0 DC 1.5 Vb 0 Vb DC 0 .DC Vd 0 1.5 0.05 Vg 0.5 1.5 0.25 .options sc
www.eeworm.com/read/376085/9332680

sp fig33_20b.sp

* Figure 33.20b CMOS: Mixed-Signal Circuit Design * M1 Vd Vg Vs Vb nmos W=10 L=1 Vg Vg 0 DC 0 Vs Vs 0 DC 0 Vd Vd 0 DC 1.5 Vb 0 Vb DC 0 .DC Vg 0 1.5 0.05 Vb 0 1.25 0.25 .options scal