搜索结果
找到约 51 项符合
verification 的查询结果
按分类筛选
其他书籍 Advanced ASIC Chip Synthesis Using Synopsys Design Compiler. This second edition of this book descr
Advanced ASIC Chip Synthesis Using Synopsys Design Compiler. This second edition of this book describes the advanced concepts and
techniques used towards ASIC chip synthesis, physical synthesis, formal
verification and static timing analysis, using the Synopsys suite of tools.
行业发展研究 The use of hardware description languages (HDLs) is becoming increasingly common for designing and
The use of hardware description languages (HDLs) is becoming
increasingly common for designing and verifying FPGA designs.
Behavior level description not only increases design productivity, but also
provides unique advantages for design verification. The most dominant
HDLs today are Verilog and VHDL ...
其他 The W78E58B is an 8-bit microcontroller which has an in-system programmable Flash EPROM for firmwa
The W78E58B is an 8-bit microcontroller which has an in-system programmable Flash EPROM for
firmware updating. The instruction set of the W78E58B is fully compatible with the standard 8052. The
W78E58B contains a 32K bytes of main ROM and a 4K bytes of auxiliary ROM which allows the
contents of t ...
电子书籍 The emphasis of this book is on real-time application of Synopsys tools, used to combat various pro
The emphasis of this book is on real-time application of Synopsys tools, used
to combat various problems seen at VDSM geometries. Readers will be
exposed to an effective design methodology for handling complex, submicron
ASIC designs. Significance is placed on HDL coding styles,
synthesis and optimi ...
书籍 System+Design+for+Telecommunication+Gateways
The idea for this book was born during one of my project-related trips to the beautiful city
of Hangzhou in China, where in the role of Chief Architect I had to guide a team of very
young, very smart and extremely dedicated software developers and verification engineers.
Soon it became clear that as ...
技术资料 IEEE_Verilog_2001
The Verilog Hardware Description Language (HDL) is defined in this standard. Verilog HDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable,it supports the development,verification, synthesis,and testing o ...
技术资料 《道路车辆功能安全》ISO26262-9
ISO 26262《道路车辆功能安全》国际标准是针对总重不超过3.5吨八座乘用车，以安全相关电子电气系统的特点所制定的功能安全标准，基于IEC 61508《安全相关电气/电子/可编程电子系统功能安全》制定，在2011年11月15日正式发布。ISO 26262是史上第一个适用于大批量量产产品的功能安全（Functional Safety）标准。特别需要注意 ...
技术资料 《道路车辆功能安全》ISO26262-5
ISO 26262《道路车辆功能安全》国际标准是针对总重不超过3.5吨八座乘用车，以安全相关电子电气系统的特点所制定的功能安全标准，基于IEC 61508《安全相关电气/电子/可编程电子系统功能安全》制定，在2011年11月15日正式发布。ISO 26262是史上第一个适用于大批量量产产品的功能安全（Functional Safety）标准。特别需要注意 ...
技术资料 《道路车辆功能安全》ISO26262-3
ISO 26262《道路车辆功能安全》国际标准是针对总重不超过3.5吨八座乘用车，以安全相关电子电气系统的特点所制定的功能安全标准，基于IEC 61508《安全相关电气/电子/可编程电子系统功能安全》制定，在2011年11月15日正式发布。ISO 26262是史上第一个适用于大批量量产产品的功能安全（Functional Safety）标准。特别需要注意 ...
技术资料 《道路车辆功能安全》ISO26262
ISO 26262《道路车辆功能安全》国际标准是针对总重不超过3.5吨八座乘用车，以安全相关电子电气系统的特点所制定的功能安全标准，基于IEC 61508《安全相关电气/电子/可编程电子系统功能安全》制定，在2011年11月15日正式发布。ISO 26262是史上第一个适用于大批量量产产品的功能安全（Functional Safety）标准。特别需要注意 ...