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VHDL/FPGA/Verilog Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGH
Top module name : SHIFTER (File name : SHIFTER.v)
2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT.
3. Output pins: OUT [15:0].
4. Input signals generated from test pattern are latched in one cycle and are
synchronized at clock rising edge.
5. The SHIFT signal describes the shift number. The shift ...
语音压缩 The files in this directory comprise ANSI-C language reference implementations of the CCITT (Intern
The files in this directory comprise ANSI-C language reference implementations
of the CCITT (International Telegraph and Telephone Consultative Committee)
G.711, G.721 and G.723 voice compressions. They have been tested on Sun
SPARCstations and passed 82 out of 84 test vectors published by CCITT
(De ...
人工智能/神经网络 This code in this directory implements the binary hopfield network.Source code may be found in HOPNE
This code in this directory implements the binary hopfield network.Source code may be found in HOPNET.CPP. A sample training file is H7x8N4.trn. Sample test pattern files are: H7x8D4.TST, H5x8D7.TST,H5x8D7.TST and H5x8D9.TST, Output of the program goes to both the
screen and a file, ARCHIVE.LST.
其他嵌入式/单片机内容 开发平台:ADS 1.2 功能：ARM下JPG文件转成BMP文件 1、在C盘根目录下放一个JPG文件
开发平台:ADS 1.2
功能：ARM下JPG文件转成BMP文件
1、在C盘根目录下放一个JPG文件，改名叫test.jpg
2、在ads1.2的AXD下选ARMULATE仿真。
3、运行完毕，在C盘根目录下会产生一个test.bmp文件
注意：有的JPG文件格式可能不兼容，最好先用WINDOWS XP自带的画图程序打开并
保存一下。
Seloo luo
seloo@tom.com
2008-10-10 ...
软件工程 Testability is the concern most often voiced by Texas Instruments (TIä ) application specific i
Testability is the concern most often voiced by Texas Instruments (TI&#228 )
application specific integrated circuit (ASIC) users. This document is intended
to consolidate TI policies into a coherent approach to designing for testability.
It is not intended as a specification, but as a guide you can ...
matlab例程 the text file QMLE contains the quasi maximum likelyhood estimating procedure and performing Infor
the text file QMLE contains the quasi maximum
likelyhood estimating procedure and performing Information Matrix test
for a univariate GARCH(1,1) model
VHDL/FPGA/Verilog 数字频率计
数字频率计，七位计数，显示六位，带test模块
操作系统开发 掌握在uC/OS-II 操作系统下使用ZLG/GUI的基本方法。 1. 启动 ADS 1.2
掌握在uC/OS-II 操作系统下使用ZLG/GUI的基本方法。
1. 启动 ADS 1.2，使用 ARM Executable Image for UCOSII(for lpc22xx)工程模板建立一
个工程 gui_ucos，工程存储在 uCOS-II 目录下。
说明：在 uCOS-II 目录下要保存有 uCOS-II 的移植代码和内核源代码。
2. 建立 C 源文件 Test .c，编写实验程序，保存到 gui_ucos\sr ...
单片机开发 The DHRY program performs the dhrystone benchmarks on the 8051. Dhrystone is a general-performanc
The DHRY program performs the dhrystone benchmarks on the 8051.
Dhrystone is a general-performance benchmark test originally
developed by Reinhold Weicker in 1984. This benchmark is
used to measure and compare the performance of different
computers or, in this case, the efficiency of the code
gener ...
单片机开发 This Application Note describes the steps that are required to install and use the Keil Monitor-51 o
This Application Note describes the steps that are required to install and use the Keil Monitor-51 on a
user specific hardware. The Keil Monitor-51 allows you to connect your 8051 hardware to the μVision2
Debugger. You can use the powerful debugging interface to test application programs in your ta ...