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文章/文档 The Inter IC bus or I2C bus is a simple bidirectional two wire bus designed primarily for general co

The Inter IC bus or I2C bus is a simple bidirectional two wire bus designed primarily for general control and data transfer communication between ICs. Some of the features of the I2C bus are: &#8226 Two signal lines, a serial data line (SDA) and a serial clock line (SCL), and ground are required. A ...
https://www.eeworm.com/dl/652/356451.html
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技术资料 AD810

PRODUCT DESCRIPTION The AD810 is a composite and HDTV compatible, current feedback, video operational amplifier, ideal for use in systems such as multimedia, digital tape recorders and video cameras. The 0.1 dB flatness specification at bandwidth of 30 MHz (G = +2) and the different ...
https://www.eeworm.com/dl/521528.html
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书籍 Physical Layer Security in Wireless Communications

The ever-increasing demand for private and sensitive data transmission over wireless net- works has made security a crucial concern in the current and future large-scale, dynamic, and heterogeneous wireless communication systems. To address this challenge, computer scientists and engineers have trie ...
https://www.eeworm.com/dl/522054.html
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教程资料 Cadence PSD 15.0版本功能介绍

随着PCB设计复杂程度的不断提高，设计工程师对 EDA工具在交互性和处理复杂层次化设计功能的要求也越来越高。Cadence Design Systems, Inc. 作为世界第一的EDA工具供应商，在这些方面一直为用户提供业界领先的解决方案。在 Concept-HDL15.0中，这些功能又得到了大度地提升。首先，Concept-HDL15.0，提供了交互式全局属性修改 ...
https://www.eeworm.com/dl/cadence/doc/36658.html
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可编程逻辑 Cadence PSD 15.0版本功能介绍

随着PCB设计复杂程度的不断提高，设计工程师对 EDA工具在交互性和处理复杂层次化设计功能的要求也越来越高。Cadence Design Systems, Inc. 作为世界第一的EDA工具供应商，在这些方面一直为用户提供业界领先的解决方案。在 Concept-HDL15.0中，这些功能又得到了大度地提升。首先，Concept-HDL15.0，提供了交互式全局属性修改 ...
https://www.eeworm.com/dl/kbcluoji/40211.html
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教程资料 Xilinx UltraScale：新一代架构满足您的新一代架构需求（EN）

　　中文版详情浏览：http://www.elecfans.com/emb/fpga/20130715324029.html 　　Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture 　 　The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class ...
https://www.eeworm.com/dl/fpga/doc/32075.html
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可编程逻辑 Xilinx UltraScale：新一代架构满足您的新一代架构需求（EN）

　　中文版详情浏览：http://www.elecfans.com/emb/fpga/20130715324029.html 　　Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture 　 　The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class ...
https://www.eeworm.com/dl/kbcluoji/38746.html
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操作系统开发 vxworks源代码

大名鼎鼎的嵌入式操作系统vxworks的完整的源代码，支持多种体系结构的嵌入式处理器，如arm,x86,i960,mc68k,mips,ppc,sparc等，包含完整的实时多任务处理及网络tcpip,dhcp,rip等协议，tffs文件系统，以及各种硬件驱动程序如usb--All the source code of Famous vxwork Embedded operating system , it supports the Embedded ...
https://www.eeworm.com/dl/510240.html
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书籍 Fundamental Limits on a Class of Secure

Abstract—In the future communication applications, users may obtain their messages that have different importance levels distributively from several available sources, such as distributed storage or even devices belonging to other users. This scenario is the best modeled by the multilevel diversity ...
https://www.eeworm.com/dl/521171.html
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书籍 Wireless Communications 2nd Edition

n the first part of this book, we give an introduction to the basic applications of wireless com- munications, as well as the technical problems inherent in this communication paradigm. After a brief history of wireless, Chapter 1 describes the different types of wireless services, and works out the ...
https://www.eeworm.com/dl/522199.html
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