搜索：system verilog - 虫虫下载站

VHDL/FPGA/Verilog verilog源码

verilog源码，可实现两位的加法器，在xillinx foundation 3.1下验证通过

https://www.eeworm.com/dl/663/175098.html

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VHDL/FPGA/Verilog verilog编写的状态机检测00100序列. 实现 input:...011000010010000... output:...000000000100100... 并且用测试模块来验证状

verilog编写的状态机检测00100序列. 实现 input:...011000010010000... output:...000000000100100... 并且用测试模块来验证状态是否正确工作

https://www.eeworm.com/dl/663/175203.html

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VHDL/FPGA/Verilog VERILOG HDL 实际工控项目源码开发工具 altera quartus2

VERILOG HDL 实际工控项目源码开发工具 altera quartus2

https://www.eeworm.com/dl/663/175694.html

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VHDL/FPGA/Verilog 一个霹雳灯的Verilog源程序

一个霹雳灯的Verilog源程序，用PWM原理实现，产生了LED灯的渐弱效果

https://www.eeworm.com/dl/663/175755.html

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其他  mpeg 2 system 1,2,3 all user need to check it out

mpeg 2 system 1,2,3 all user need to check it out

https://www.eeworm.com/dl/534/175763.html

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单片机开发  用verilog实现单片机计数器用verilog实现单片机计数器

用verilog实现单片机计数器用verilog实现单片机计数器

https://www.eeworm.com/dl/648/175814.html

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VHDL/FPGA/Verilog 硬件描述语言,verilog HDL,实现了解码器的设计

硬件描述语言,verilog HDL,实现了解码器的设计

https://www.eeworm.com/dl/663/176303.html

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matlab例程  Matlab System tools Mimo Tool Box

Matlab System tools Mimo Tool Box

https://www.eeworm.com/dl/665/176441.html

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VHDL/FPGA/Verilog Verilog编写的简单异步串口完全原创

Verilog编写的简单异步串口完全原创，站长请查看内容

https://www.eeworm.com/dl/663/176457.html

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操作系统开发  it s a lift simulator, use operating system concept call mutex to implenment a lift. I do it prefect

it s a lift simulator, use operating system concept call mutex to implenment a lift. I do it prefectly.

https://www.eeworm.com/dl/531/176534.html

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