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系统设计方案 The purpose of this application note is to describe the main elements of an RS-422 and RS-485 syste

The purpose of this application note is to describe the main elements of an RS-422 and RS-485 system. This application note attempts to cover enough technical details so that the system designer will have considered all the important aspects in his data system design. Since both RS-422 and RS- 485 a ...
https://www.eeworm.com/dl/678/219921.html
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驱动编程 The PCI Local bus concept was developed to break the PC data I/O bottleneck and clearly opens the d

The PCI Local bus concept was developed to break the PC data I/O bottleneck and clearly opens the door to increasing system speed and expansion capabilities. The PCI Local bus moves high speed peripherals from the I/O bus and places them closer to the system’s processor bus, providing faster data t ...
https://www.eeworm.com/dl/618/272788.html
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书籍 POWERHVMOS_Devices_Compact_Modeling

The continuous progress in modern power device technology is increasingly supported by power-specific modeling methodologies and dedicated simulation tools. These enable the detailed analysis of operational principles on the the device and on the system level; in particular, they allow the designer ...
https://www.eeworm.com/dl/522343.html
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技术资料 以太网FPGA代码

详细说明:具备GMII接口和ARP协议功能的千兆以太网控制器。经过Xilinx SPATAN-III FPGA验证, Verilog描述-With GMII interface and feature ARP protocol Gigabit Ethernet controller. After Xilinx SPATAN-III FPGA verification, Verilog description
https://www.eeworm.com/dl/871518.html
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技术资料 Synopsys工具简介

VCS 是编译型Verilog 模拟器,它完全支持OVI 标准的Verilog HDL 语言、PLI 和SDF。VCS 具有目前行业中最高的模拟性能,其出色的内存管理能力足以支持千万门级的AS
https://www.eeworm.com/dl/900174.html
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技术资料 基于CPLD的双屏结构液晶控制器的研究与设计

可编程逻辑器件CPLD 体积小功能强大, Verilog HDL 语言简练,设计思想、电路结构和逻辑关系清晰,本文着重介绍使用Verilog 设计CPLD 实现双屏显示液晶控制器的功能。
https://www.eeworm.com/dl/919205.html
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技术资料 计算机

很好这是用verilog语言实现的32位并行加法器代码,实验可能运行有错误。。。。... verilog语言实现32位加法器资源大小:52KB 上传日期:2010-06-11 资源积分:4分
https://www.eeworm.com/dl/973062.html
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VHDL/Verilog/EDA源码 VerilogHDL入门教程.rar

FPGA硬件可编程语言verilog HDL初级入门语言,适用于初级学者
https://www.eeworm.com/dl/504/8916.html
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VHDL/Verilog/EDA源码 altera fpga 和ts201的linkport接口设计

altera fpga 和ts201的linkport接口设计的verilog代码。好好很强大
https://www.eeworm.com/dl/504/16514.html
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教程资料 利用FPGA来实现一个简单的医疗呼叫系统

利用FPGA来实现一个简单的医疗呼叫系统,使用语言VERILOG
https://www.eeworm.com/dl/fpga/doc/17530.html
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