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VC书籍 用户界面设计英文书籍
用户界面设计英文书籍，名字叫“custom interface kit"
嵌入式/单片机编程 The major functionality added in this release includes: - Rootless mode in X11 - Widget Templt
The major functionality added in this release includes:
- Rootless mode in X11
- Widget Templtes [both compiled and XML]
As always, this isn t meant to be a stable release, it is only provided so
people can more easily experiment with PicoGUI and possibly help in its
development.
Some of the ...
游戏 <1>学习3D中的地形.pdf <2>Mathematics.for.3D.Game.Programming.and.Computer.Graphics.2E.July.20
<1>学习3D中的地形.pdf
<2>Mathematics.for.3D.Game.Programming.and.Computer.Graphics.2E.July.2005.pdf
<3>向量在游戏中的应用.pdf
<4>3D-Math-Primer for graphics and game development.pdf
这我所找到相关游戏开发过程，可能遇到的3d游戏方面数学上的资料！ ...
VHDL/FPGA/Verilog It is a first time code being developed to designers who want to get your DDR2 SDRAM on-board in Spa
It is a first time code being developed to designers who want to get your DDR2 SDRAM on-board in Spartan 3AN Starter Kit - Diligent fully working.
Java书籍 The purpose of this chapter is to bring relative newcomers up to speed in writing, compiling, and pa
The purpose of this chapter is to bring relative newcomers up to speed in writing, compiling, and packaging servlets and JSPs. If you have never developed a servlet or JSP before, or just need to brush up on the technology to jumpstart your development, then the upcoming recipes provide simple progr ...
VHDL/FPGA/Verilog it is a verilog code written for MAX1886 ADC interin modelsim simulator and it will synthesize in x
it is a verilog code written for MAX1886 ADC interin modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.
VHDL/FPGA/Verilog it is a verilog code written for digital watch in modelsim simulator and it will synthesize in xin
it is a verilog code written for digital watch in modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device]
VHDL/FPGA/Verilog it is a verilog code written for FIFO in modelsim simulator and it will synthesize in xinlix ise 8
it is a verilog code written for FIFO in modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device].you can use this code in any DSP project in which data entry is required.
VHDL/FPGA/Verilog it is a verilog code written for traffic light controller will synthesize in xinlix ise 8.2i.i have
it is a verilog code written for traffic light controller will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device].it is a state machine based code.
VHDL/FPGA/Verilog it is a verilog code written for MELAY state machine based UART and it wll synthesize in xinlix
it is a verilog code written for MELAY state machine based UART and it wll synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device]