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其他 2410/vxworks/tornado下的基本实验包括 serial,ramdrv,interrupt,multi-FTP,TCP,UDP-Under the basic experimental
2410/vxworks/tornado下的基本实验包括 serial,ramdrv,interrupt,multi-FTP,TCP,UDP-Under the basic experimental 2410/vxworks/tornado including serial, ramdrv, interrupt, multi-tasking, FTP, TCP, UDP
通讯编程文档 Transitition from single carrier to multi carrier equalization
Transitition from single carrier to multi carrier equalization
通讯编程文档 Multi-Carrier CDMA in a Rayleigh Fading Channel
Multi-Carrier CDMA in a Rayleigh Fading Channel
其他 search multi Excel and Output to BookXX.xls [Delphi]
search multi Excel and Output to BookXX.xls [Delphi]
matlab例程 CDMA MULTI USER INTERFERENCE,AFTER DESPREADING,BER
CDMA MULTI USER INTERFERENCE,AFTER DESPREADING,BER
GPS编程 An ANOVA Based GPS Multipath Detection Algorithm Using Multi Chan
An ANOVA Based GPS Multipath Detection Algorithm Using Multi Chan
其他 FACE RECOGNITION USING PRINCIPAL COMPONENTS ANALYSIS task. To this package four options
FACE RECOGNITION
USING
PRINCIPAL
COMPONENTS
ANALYSIS
task. To this package four options for the algorithms, the
LVQ1, the LVQ2.1, the LVQ3 and the OLVQ1, have been selected.
通讯编程文档 I designed the digital multi-function human-computer interaction of arc welding inverter power syste
I designed the digital multi-function human-computer interaction of arc welding inverter power system
其他嵌入式/单片机内容 Event counter for MSP430 - multi channel and real fast using latched interrupts.
Event counter for MSP430 - multi channel and real fast using latched interrupts.
VHDL/FPGA/Verilog Designing a synchronous finite state machine (FSM) is a common task for a digital logic engineer. T
Designing a synchronous finite state machine (FSM) is a common task for a digital
logic engineer. This paper discusses a variety of issues regarding FSM design using
Synopsys Design Compiler. Verilog and VHDL coding styles are presented, and
different methodologies are compared using real-world exam ...