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其他书籍 Builder uses to integrate a larger system module. Each component consists of a structured set of fi
Builder uses to integrate a larger system module. Each component
consists of a structured set of files within a directory.
The files in a component directory serve the following
The RS232 UART Core implements a method for communication of serial data. The core provides
a simple register-mapped Avalo ...
Java编程 In the bank all the activities are being done manually .As the bank widens its services & it finds d
In the bank all the activities are being done manually .As the bank widens its services & it finds difficult to manage its operations manually and hence this leads to the automation of some of its operations.
Banking Information system is a windows based applications. This project mainly deal ...
通讯/手机编程 一个不错的modbus源码
一个不错的modbus源码，含有master和slave两部分
嵌入式/单片机编程 I always believe that one will easily lag behind unless he keeps on learning. Of course, if I am giv
I always believe that one will easily lag behind unless he keeps on learning. Of course, if I am given a chance for advanced studies in this famous University , I will stare to effort to master a good command of advance my capability.
VHDL/FPGA/Verilog This is is a bridge IP core to interface the Tensilica PIF bus protocol with the OpenCores WishBone.
This is is a bridge IP core to interface the Tensilica PIF bus protocol with the OpenCores WishBone. It currently supports single-cycle as well as burst transfer operations. The core has been tested in a master-PIF slave-WB configuration.
VHDL/FPGA/Verilog This document gives the code for programming a CC2500 transceiver using Altera Stratix FPGA. The FPG
This document gives the code for programming a CC2500 transceiver using Altera Stratix FPGA. The FPGA and CC2500 are connected through SPI mode with the FPGA as the master and CC2500 as the slave.
Java编程 jamod is an object oriented implementation of the Modbus protocol, realized 100 in Java. It allows
jamod is an object oriented implementation of the Modbus protocol, realized 100 in Java. It allows to quickly realize master and slave applications in various transport flavors (IP and serial).
VHDL/FPGA/Verilog In this work an implementation of a geometric nonlinear controller for chaos synchronization in a Fi
In this work an implementation of a geometric nonlinear controller for chaos synchronization in a Field Programmable Gate Array (FPGA) is presented. The Lorenz chaotic system is used to show the implementation of chaos synchronization via nonlinear controller implemented in a Xilinx FPGA Virtex-II 2 ...
Java编程 Exploring C++ uses a series of self–directed lessons to divide C++ into bite–sized chunks that you c
Exploring C++ uses a series of self–directed lessons to divide C++ into bite–sized chunks that you can digest as rapidly as you can swallow them. The book assumes only a basic understanding of fundamental programming concepts (variables, functions, expressions, statements) and requires no prior kn ...