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微处理器开发 NAME: u2440mon.c DESC: u2440mon entry point,menu,download HISTORY: Mar.25.2002:purnnamu: S3C24
NAME: u2440mon.c
DESC: u2440mon entry point,menu,download
HISTORY:
Mar.25.2002:purnnamu: S3C2400X profile.c is ported for S3C2410X.
Mar.27.2002:purnnamu: DMA is enabled.
Apr.01.2002:purnnamu: isDownloadReady flag is added.
Apr.10.2002:purnnamu: - Selecting menu is available in the waiting loop ...
单片机开发 //*** *** *** *** *** *** *** *** *** *** *** *** *** * // MSP-FET430x110 Demo - Software Toggle P1
//*** *** *** *** *** *** *** *** *** *** *** *** *** *
// MSP-FET430x110 Demo - Software Toggle P1.0
//
// Description: Toggle P1.0 by xor ing P1.0 inside of a software loop.
// ACLK = n/a, MCLK = SMCLK = default DCO ~800k
//
// MSP430F1121
// -----------------
// /|\| XIN|-
// | | |
// --|RST XOUT ...
Java编程 MediaPlayer代码
MediaPlayer代码，部分代码，合适请用：
import java.awt.*
import java.awt.event.*
import javax.swing.*
import javax.media.*
import java.io.*
import java.util.* //为了导入Vector
//import com.sun.java.swing.plaf.windows.*
public class MediaPlayer extends JFrame implements ActionListener,Runnable
...
其他书籍 ADM6993F/FXFiber to Fast Ethernet Converter (TS1000 CPE Complied) The ADM6993F/FX is a single chip
ADM6993F/FXFiber to Fast Ethernet Converter (TS1000 CPE Complied)
The ADM6993F/FX is a single chip integrating two 10/100 Mbps MDIX TX/FX transceivers, a three-port 10/100M Ethernet L2 switch controller, and one OAM engine to meet demanding applications, including Fiber-to-Ethernet media converters, ...
Linux/Unix编程 This GLib version 2.16.1. GLib is the low-level core library that forms the basis for projects such
This GLib version 2.16.1. GLib is the low-level core
library that forms the basis for projects such as GTK+ and GNOME. It
provides data structure handling for C, portability wrappers, and
interfaces for such runtime functionality as an event loop, threads,
dynamic loading, and an object system.
VHDL/FPGA/Verilog DDR SDRAM控制器的VHDL源代码
DDR SDRAM控制器的VHDL源代码，含详细设计文档。
The DDR, DCM, and SelectI/O&#8482 features in the Virtex&#8482 -II architecture make it the perfect
choice for implementing a controller of a Double Data Rate (DDR) SDRAM. The Digital Clock
Manager (DCM) provides the required Delay Locked Loop (DLL), Dig ...
书籍源码 A novel met hod t o p artially compensate sigma2delta shap ed noise is p rop osed. By injecting t he
A novel met hod t o p artially compensate sigma2delta shap ed noise is p rop osed. By injecting t he comp en2
sation cur rent int o t he p assive loop f ilte r during t he delay time of t he p hase f requency detect or ( PFD) , a maximum
reduction of t he p hase noise by about 16dB can be achieved. ...
DSP编程 This document describes how to switch to and program the unisersal serial bus (USB) analog phase-lo
This document describes how to switch to and program the unisersal serial bus (USB)
analog phase-locked loop (APLL) on the C5506/C5507/C5509A devices. Example
assembly programs for programming and switching to and from the APLL are also
provided in the attached zip file. It is assumed that the reade ...
VC书籍 以传统的C/SDK 撰写Windows 程序
以传统的C/SDK 撰写Windows 程序，最大的好处是可以清楚看见整个程序的来龙去脉
和消息动向，然而这些重要的动线在MFC 应用程序中却隐晦不明，因为它们被Application
Framework 包起来了。这一章主要目的除了解释MFC 应用程序的长像，也要从MFC 源代
码中检验出一个Windows 程序原本该有的程序进入点（WinMain）、视窗类别 ...
DSP编程 合众达的DM642示例工程
合众达的DM642示例工程，包括视频loop，spi接口，SD卡，i2c接口，FLASH自动boot