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单片机编程 基于CH341A的USB串口通讯设计

为解决当前计算机串行通讯接口只有USB,难以满足旧型号设备或某些单片机要求RS232通讯的问题,设计出两款RS232/USB电路。采用CH341A与MAX223集成电路芯片构建标准9线RS232/USB通用接口转换器,无需编程。采用CH341A与PIC16F877A构建单片机与计算机之间的USB通讯电路,软件遵循RS232通讯协议,硬件进行电平转换。实际使用表 ...
https://www.eeworm.com/dl/502/29127.html
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单片机编程 AD9859芯片资料

FEATURES400 MSPS internal clock speedIntegrated 10-bit DAC32-bit tuning wordPhase noise ≤ –120 dBc/Hz @ 1 kHz offset (DAC output)Excellent dynamic performance>75 dB SFDR @ 160 MHz (±100 kHz offset) AOUTSerial I/O control1.8 V power supplySoftware and hardware controlled power-down48-lead TQFP/EP ...
https://www.eeworm.com/dl/502/29887.html
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单片机编程 DUAL RS-232 DRIVER RECEIVER WI

The TRS232E is a dual driver/receiver that includes a capacitive voltage generator to supply TIA/RS-232-Fvoltage levels from a single 5-V supply. Each receiver converts TIA/RS-232-F inputs to 5-V TTL/CMOS levels.This receiver has a typical threshold of 1.3 V, a typical hysteresis of 0.5 V, and can a ...
https://www.eeworm.com/dl/502/31044.html
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单片机编程 Input Signal Rise and Fall Tim

All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, howeve ...
https://www.eeworm.com/dl/502/31376.html
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单片机编程 介绍C16x系列微控制器的输入信号升降时序图及特性

All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, howeve ...
https://www.eeworm.com/dl/502/31379.html
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教程资料 Xilinx UltraScale:新一代架构满足您的新一代架构需求(EN)

  中文版详情浏览:http://www.elecfans.com/emb/fpga/20130715324029.html   Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture    The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class ...
https://www.eeworm.com/dl/fpga/doc/32075.html
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教程资料 WP312-Xilinx新一代28nm FPGA技术简介

Xilinx Next Generation 28 nm FPGA Technology Overview Xilinx has chosen 28 nm high-κ metal gate (HKMG) highperformance,low-power process technology and combined it with a new unified ASMBL™ architecture to create a new generation of FPGAs that offer lower power and higher performance. ...
https://www.eeworm.com/dl/fpga/doc/32613.html
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教程资料 WP369可扩展式处理平台-各种嵌入式系统的理想解决方案

WP369可扩展式处理平台-各种嵌入式系统的理想解决方案 :Delivering unrivaled levels of system performance,flexibility, scalability, and integration to developers,Xilinx's architecture for a new Extensible Processing Platform is optimized for system power, cost, and size. Based on ARM's dual-c ...
https://www.eeworm.com/dl/fpga/doc/32614.html
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传感与控制 多远程二极管温度传感器 (Design Considerat

多远程二极管温度传感器-Design Considerations for pc thermal management Multiple RDTS (remote diode temperature sensing) provides the most accurate method of sensing an IC’s junction temperature. It overcomes thermal gradient and placement issues encountered when trying to place external sensors. PC ...
https://www.eeworm.com/dl/562/34526.html
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开发工具 MAXQUSBJTAGOW评估板软件

MAXQUSBJTAGOW评估板软件:关键特性 Easily Load and Debug Code Interface Provides In-Application Debugging Features Step-by-Step Execution Tracing Breakpointing by Code Address, Data Memory Address, or Register Access Data Memory View and Edit Supports Logic Levels from 1.1V to 3.6V Supports JTAG and 1 ...
https://www.eeworm.com/dl/550/37597.html
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