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嵌入式/单片机编程 A digital fi‘equeney meter designed with FPGA development software Q-~us 11 is introduced．The 1 Hz—l
A digital fi‘equeney meter designed with FPGA development software Q-~us 11 is introduced．The 1 Hz—l MHz input measured pulse signals of the digital ii‘equency meter can be used for measuring frequency，period，pulse width and duty ratio，etc．The test results stably display O71 3 seven—segment ...
微处理器开发 This code is described in "Computational Geometry in C" (Second Edition), Chapter 8. It is not writ
This code is described in "Computational Geometry in C" (Second Edition),
Chapter 8. It is not written to be comprehensible without the
explanation in that book.
Prints out one arm configuration to reach given target.
Assumes number of links >= 3.
Input:
nlinks Number of links
L1 L2 ... Ln Link l ...
Java编程 Java is the first language to provide a cross-platform I/O library that is powerful enough to handle
Java is the first language to provide a cross-platform I/O library that is powerful enough to handle all these diverse tasks. Java is the first programming language with a modern, object-oriented approach to input and output. Java s I/O model is more powerful and more suited to real-world tasks than ...
嵌入式/单片机编程 These are P-Channel enhancement mode silicon gate power fi eld effect transistors. They are ad
These are P-Channel enhancement mode silicon gate
power &#64257 eld effect transistors. They are advanced power
MOSFETs designed, tested, and guaranteed to withstand a
speci&#64257 ed level of energy in the breakdown avalanche mode
of operation. All of these power MOSFETs are designed for
applicatio ...
驱动编程 The SP486 and SP487 are low–power quad differential line drivers meeting RS-485 and RS-422 standard
The SP486 and SP487 are low–power quad differential line drivers meeting RS-485 and RS-422
standards. The SP486 features a common driver enable control the SP487 provides independent
driver enable controls for each pair of drivers. Both feature tri–state outputs and wide
common–mode input range. ...
嵌入式/单片机编程 使用FPGA/CPLD设置语音AD、DA转换芯片AIC23
使用FPGA/CPLD设置语音AD、DA转换芯片AIC23，FPGA/CPLD系统时钟为24.576MHz
1、AIC系统时钟为12.288MHz，SPI时钟为6.144MHz
2、AIC处于主控模式
3、input bit length 16bit output bit length 16bit MSB first
4、帧同步在96KHz
书籍 Fundamentals+of+Wireless+Communication
The writing of this book was prompted by two main developments in wireless
communications in the past decade. First is the huge surge of research activities in
physical-layer wireless communication theory. While this has been a subject of study
since the 60’s, recent developments in the field, such ...
技术资料 DP转HDMI转换原理图
CH7525 is a low-cost, low-power semiconductor device that translates the DisplayPort signal to HDMI/DVI. This innovative DisplayPort receiver with an integrated HDMI Transmitter is specially designed to target the notebook/ultrabook, tablet device and PC market segments. Through the CH7525’s advanc ...
技术资料 Rockchip 电源IC RK816 技术手册
The RK816 is a complex power management integrated circuit (PMIC) for multi-core system applications powered by Li-ion polymer battery cell, or by a 5V input either form an USB port or form an adapter. The RK816 can provide a complete power management solution with very few external c ...
技术资料 LIS8712B 12W 40V/280mA 单电压应用 LED 驱动方案
LIS8712B 12W 40V/280mA 单电压应用 LED 驱动方案
Input: 180Vac/50Hz~264Vac/50Hz;
Output: 27V~40V/220mA~280mA
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