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找到约 116 项符合 finiTE 的查询结果

编译器/解释器 this code define the deterministic finite automata using genetic programming

this code define the deterministic finite automata using genetic programming
https://www.eeworm.com/dl/628/488523.html
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编译器/解释器 this code define non-deterministic finite automata using lisp

this code define non-deterministic finite automata using lisp
https://www.eeworm.com/dl/628/488525.html
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matlab例程 This matlab program compares the results of different window design methods for finite impulse respo

This matlab program compares the results of different window design methods for finite impulse response filters (FIRs): the rectangular window, Blackman window, Bartlett window, Hamming window and the Hanning window.
https://www.eeworm.com/dl/665/489251.html
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数值算法/人工智能 Finite element program for mechanical problem. It can solve various problem in solid problem

Finite element program for mechanical problem. It can solve various problem in solid problem
https://www.eeworm.com/dl/518/492033.html
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Mentor Design Safe Verilog State Machine(Synplicity)

  One of the strengths of Synplify is the Finite State Machine compiler. This is a powerfulfeature that not only has the ability to automatically detect state machines in the sourcecode, and implement them with either sequential, gray, or one-hot encoding. But alsoperform a reachability ana ...
https://www.eeworm.com/dl/Mentor/21525.html
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Mentor Creating Safe State Machines(Mentor)

  Finite state machines are widely used in digital circuit designs. Generally, when designing a state machine using an HDL, the synthesis tools will optimize away all states that cannot be reached and generate a highly optimized circuit. Sometimes, however, the optimization is not acceptabl ...
https://www.eeworm.com/dl/Mentor/21526.html
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可编程逻辑 Design Safe Verilog State Machine(Synplicity)

  One of the strengths of Synplify is the Finite State Machine compiler. This is a powerfulfeature that not only has the ability to automatically detect state machines in the sourcecode, and implement them with either sequential, gray, or one-hot encoding. But alsoperform a reachability ana ...
https://www.eeworm.com/dl/kbcluoji/40146.html
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可编程逻辑 Creating Safe State Machines(Mentor)

  Finite state machines are widely used in digital circuit designs. Generally, when designing a state machine using an HDL, the synthesis tools will optimize away all states that cannot be reached and generate a highly optimized circuit. Sometimes, however, the optimization is not acceptabl ...
https://www.eeworm.com/dl/kbcluoji/40149.html
下载: 134
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其他 NTL is a high-performance, portable C++ library providing data structures and algorithms for manipul

NTL is a high-performance, portable C++ library providing data structures and algorithms for manipulating signed, arbitrary length integers, and for vectors, matrices, and polynomials over the integers and over finite fields.
https://www.eeworm.com/dl/534/136707.html
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其他书籍 Verilog and VHDL状态机设计

Verilog and VHDL状态机设计,英文pdf格式 State machine design techniques for Verilog and VHDL Abstract : Designing a synchronous finite state Another way of organizing a state machine (FSM) is a common task for a digital logic only one logic block as shown in engineer. This paper will discuss a var ...
https://www.eeworm.com/dl/542/200846.html
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