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单片机开发 外部SRAM与C8051F000接口 Copyright (C) 2000 CYGNAL INTEGRATED PRODUCTS, INC. All rights reserved. FILE N
外部SRAM与C8051F000接口 Copyright (C) 2000 CYGNAL INTEGRATED PRODUCTS, INC. All rights reserved. FILE NAME : Sram.ASM TARGET MCU : C8051F000 DESCRIPTION : External Sram read/write verification routine for IDT 71V124SA.
压缩解压 A high quality VC++ source code implementing the very important context-based adaptive arithmetic co
A high quality VC++ source code implementing the very important context-based adaptive arithmetic coder.
编译器/解释器 CC386 is a general-purpose 32-bit C compiler. It is not an optimizing compiler but given that the co
CC386 is a general-purpose 32-bit C compiler. It is not an optimizing compiler but given that the code generation is fairly good. There are two versions one is for MSDOS/DPMI and one is for Win32. The Win32 version has a full-blown IDE capable of editing, building, and debugging windows programs inc ...
其他嵌入式/单片机内容 Support is available from MIPS Technologies Inc. - problems should be addressed to support@mips.co
Support is available from MIPS Technologies Inc. - problems should be
addressed to support@mips.com。This product may be controlled for export purposes.
You may not export, or transfer for the purpose of reexport, any technical
data received hereunder or the product produced by use of such techni ...
人工智能/神经网络 CoLIN 人工语言模拟 汉化版 2002年8月9日 原作者 布朗 alan j. brown 15 Kinloch Road Renfrew Scotland PA4
CoLIN 人工语言模拟 汉化版 2002年8月9日
原作者
布朗 alan j. brown
15 Kinloch Road
Renfrew
Scotland
PA4 0RJ
alan@barc0de.demon.co.uk
http://www.barc0de.demon.co.uk/
汉化者
陈辉
主页： http://go2debug.yeah.net
邮件： go2debug@hotmail.com
ICQ： 149054569
简介
通过菜单可以清空数据库 ...
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本站程序加入2分钟自动刷新离开机时间接近的自动刷新排名到第一 加入通宵推荐 精品推荐 固定推荐
私服自动采集功能 解决了 手工添加的烦恼 为您节约了时间~演示地址http://www.263y.com
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USB编程 优盘程序,符合USB1.1规范。硬件平台：ATmega162+PDIUSBD12+K9F5608。软件平台：ICCAVR。协议：Bulk-Only Transport,Reduced block co
优盘程序,符合USB1.1规范。硬件平台：ATmega162+PDIUSBD12+K9F5608。软件平台：ICCAVR。协议：Bulk-Only Transport,Reduced block command.
电子书籍 The DSP Design Flow workshop provides an introduction to the advanced tools you need to design and i
The DSP Design Flow workshop provides an introduction to the advanced tools you need to design and implement DSP algorithms targeting FPGAs. This intermediate workshop in implementing DSP functions focuses on learning how to use System Generator for DSP, as well as HDL design flow, CORE Generator so ...
VHDL/FPGA/Verilog VHDL源代码.设计一个带有异步清0功能的十进制计数器。计数器时钟clk上升沿有效
VHDL源代码.设计一个带有异步清0功能的十进制计数器。计数器时钟clk上升沿有效，清零端为clrn,进位输出为co。
其他书籍 Securing Apache 2: Step-by-Step When choosing a web server, Apache very often wins against its co
Securing Apache 2: Step-by-Step
When choosing a web server, Apache very often wins against its competitors because of stability, performance, that fact that it s open source, and many other advantages. But when deciding on which version of Apache to use, the choice is not always so simple. On the o ...