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开发工具 MAXQUSBJTAGOW评估板软件
MAXQUSBJTAGOW评估板软件:关键特性 Easily Load and Debug Code Interface Provides In-Application Debugging Features Step-by-Step Execution Tracing Breakpointing by Code Address, Data Memory Address, or Register Access Data Memory View and Edit Supports Logic Levels from 1.1V to 3.6V Supports JTAG and 1 ...
实用工具 MAXQUSBJTAGOW评估板软件
MAXQUSBJTAGOW评估板软件:关键特性 Easily Load and Debug Code Interface Provides In-Application Debugging Features Step-by-Step Execution Tracing Breakpointing by Code Address, Data Memory Address, or Register Access Data Memory View and Edit Supports Logic Levels from 1.1V to 3.6V Supports JTAG and 1 ...
可编程逻辑 Xilinx UltraScale：新一代架构满足您的新一代架构需求（EN）
中文版详情浏览：http://www.elecfans.com/emb/fpga/20130715324029.html
Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture
The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class ...
其他嵌入式/单片机内容 VS1002D ADPCM RECORDING INSTRUCTIONS v 1.0 (C) 2004-09-23 VLSI SOLUTION OY This is a softwar
VS1002D ADPCM RECORDING INSTRUCTIONS v 1.0
(C) 2004-09-23 VLSI SOLUTION OY
This is a software package to patch VS1002d ADPCM recording
capability. It is explained in VS10XX Application Notes,
available at http://www.vlsi.fi/download/
See also source code src/microcontrol.c for example.
VHDL/FPGA/Verilog Hard-decision decoding scheme Codeword length (n) : 31 symbols. Message length (k) : 19 symbols.
Hard-decision decoding scheme
Codeword length (n) : 31 symbols.
Message length (k) : 19 symbols.
Error correction capability (t) : 6 symbols
One symbol represents 5 bit.
Uses GF(2^5) with primitive polynomial p(x) = X^5 X^2 + 1
Generator polynomial, g(x) = a^15 a^21*X + a^6*X^2 + a^15*X^3 + a^ ...
嵌入式Linux The aim of this application note is to show to scan the 4x4 matrix keypad multiplexed with a four
The aim of this application note is to show to scan the 4x4 matrix keypad
multiplexed with a four 7-segment display. The software attached to this application
note scans the pressed key and displays it on the multiplexed 7- segment LEDs.
This application note makes obvious Interrupt capability of ...
Java书籍 开源中间件 导入Hibernate相关的包进该项目： 选中项目名称后单击鼠标右键
开源中间件
导入Hibernate相关的包进该项目：
选中项目名称后单击鼠标右键，从弹出的右键快捷菜单中选择“MyEclise-> Add Hibernate Capability”
Modem编程 Author: wei liu Summary: simulation of binary and non-binary bch decoder MATLAB Release: R1
Author: wei liu
Summary: simulation of binary and non-binary bch decoder
MATLAB Release: R14SP1
Required Products: Communications Toolbox
Description: simulation of binary bch decoding algorithm for bch(n, k) with t bits error correction capability.
驱动编程 16 relay output channels and 16 isolated digital input channels LED indicators to show activated
16 relay output channels and 16 isolated digital input channels
LED indicators to show activated relays
Jumper selectable Form A/Form B-type relay output channel
Output status read-back
Keep relay output values when hot system reset
High-voltage isolation on input channels(2,500 VDC)
Hi ESD pr ...
单片机开发 Integration的EZMac Plus
Integration的EZMac Plus，对于开发IA4420/4421很有用！
Variable packet length protocol with packet forwarding capability MAC layer for simplifying EZRadio designs