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数据结构 The Bit Array structure provides a compacted arrays of Booleans, with one bit for each Boolean value

The Bit Array structure provides a compacted arrays of Booleans, with one bit for each Boolean value. A 0 [1] bit corresponds to the Boolean value false [true], respectively. We can look at a stream of bytes as a stream of bits each byte contains 8 bits, so any n bytes hold n*8 bits. And the operat ...
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技术资料 winDBus-10.11.2006

libdbus for windows platform 32bits
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单片机编程 芯睿 LCD 驱动单片机 MK9A35EP _cn

概述 ROM 大小:3.5K * 16 bits RAM 大小:96 * 8 bits 堆栈:8层 LCD 驱动器:7com * 27seg QFP64
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加密解密 用于实现AES加密、解密

用于实现AES加密、解密,加密128bits字符串,密码也是128bits。可扩展性很好,可以很容易地用于扩展成文件加密。
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其他 Usage: void CRC(int*,int*,int,int) Input: XAR0:coded data(InputData)

Usage: void CRC(int*,int*,int,int) Input: XAR0:coded data(InputData) XAR1:decoded CRC bits(CrcPoly) T0: Length of coded data(CodeOutlen) T1: Length of CRC bits(CrcPolylen) Return: ...
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VHDL/FPGA/Verilog Synthesizable FIFO Model This example describes a synthesizable implementation of a FIFO. The FIFO

Synthesizable FIFO Model This example describes a synthesizable implementation of a FIFO. The FIFO depth and FIFO width in bits can be modified by simply changing the value of two parameters, `FWIDTH and `FDEPTH. For this example, the FIFO depth is 4 and the FIFO width is 32 bits.
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加密解密 RSA的小程序

RSA的小程序,源码产生随机素数调用方法:N.GetPrime(bits)返回值:N被赋值为一个bits位(0x100000000进制长度)的素数
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加密解密 CRC码产生器与校验器程序 Features : Executes in one clock cycle per data word Any polynomial from 4 to 32 b

CRC码产生器与校验器程序 Features : Executes in one clock cycle per data word Any polynomial from 4 to 32 bits Any data width from 1 to 256 bits Any initialization value Synchronous or asynchronous reset
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系统设计方案 ST7787 芯片的SPEC

ST7787 芯片的SPEC,比亚迪2.4inchLCM的SPEC。The ST7787 is a single-chip controller/driver for 262K-color, graphic type TFT-LCD. It consists of 720 source line and 320 gate line driving circuits. This chip is capable of connecting directly to an external microprocessor, and accepts Serial Peripheral I ...
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技术资料 EL4443多路放大器在HDSL 2B1Q调制器中的应用

In HDSL telephony, a four-level analog modulationis used to represent two simultaneous bits of
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