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驱动编程 The DiskPerf filter driver monitors disk-accesses, capturing performance data. It supports Plug and
The DiskPerf filter driver monitors disk-accesses, capturing performance data. It supports Plug and Play, Power Management, and WMI . It is not 64-bit compliant
驱动编程 Addfilter is a command-line application which adds and removes filter drivers for a given drive or v
Addfilter is a command-line application which adds and removes filter drivers for a given drive or volume. It is intended to demonstrate how to insert a filter driver into the driver stack of a device. The sample illustrates how to do this by using the SetupDi APIs. The sample works on the x86 platf ...
驱动编程 The CD Audio sample allows some non-SCSI2 CD ROMs to support audio operations by intercepting the re
The CD Audio sample allows some non-SCSI2 CD ROMs to support audio operations by intercepting the relevant audio ioctls and translating them into the command block(s) expected by the non-compliant cdroms. It supports Plug and Play and Power Management, and is 64-bit compliant.
驱动编程 The CD ROM driver is used with Classpnp.sys to provide access to CD ROMs and DVD ROMs. It supports P
The CD ROM driver is used with Classpnp.sys to provide access to CD ROMs and DVD ROMs. It supports Plug and Play, Power Management, and AutoRun (media change notification). It is 64-bit compliant.
驱动编程 The Disk sample is used with Classpnp.sys as disk driver. The sample supports Plug and Play, Power M
The Disk sample is used with Classpnp.sys as disk driver. The sample supports Plug and Play, Power Management, WMI, and failure prediction (S.M.A.R.T.), and it is 64-bit compliant.
文件格式 Matlab is an ideal tool for simulating digital communications systems, thanks to its easy scripting
Matlab is an ideal tool for simulating digital communications systems, thanks to
its easy scripting language and excellent data visualization capabilities. One of the
most frequent simulation tasks in the field of digital communications is bit-error-
rate testing of modems. The bit-error-rate perfor ...
VHDL/FPGA/Verilog 这是序列检测器。串行序列产生是指根据时钟和相应的控制信号
这是序列检测器。串行序列产生是指根据时钟和相应的控制信号,产生稳定的单bit输出信号;监测器指根据相应时钟输入的电平序列,监测该序列中是否存在预设的序列,无论从第几个输入开始,只要存在,总能监测到。监测到予以标示。 ...
汇编语言 ORG 0000H ljmp star org 0003h ljmp $ star:mov p1,#00h mov p2,#00h mov p3,#00h int: setb ea
ORG 0000H
ljmp star
org 0003h
ljmp $
star:mov p1,#00h
mov p2,#00h
mov p3,#00h
int:
setb ea
jiance bit p1.0
shoud bit p1.1
zid bit p1.2
syajin bit p1.3
smanjin bit p1.4
jkaiguan bit p1.5
xianwei bit p1.6
tingzhi bit p3.2
out:
yajin bit p2.0
manjin bit p2.1
kuaijin bit p2.2
hanjie bit p2.3程序 ...
文件格式 This paper presents a low-power asynchronous implementation of the 80C51 microcontroller. It was rea
This paper presents a low-power asynchronous implementation of the 80C51 microcontroller. It was realized in a 0.5 &micro m CMOS process and it shows a power advantage of a factor 4 compared to a recent synchronous implementation in the same technology. The chip is fully bit compatible with the sync ...
VHDL/FPGA/Verilog 用fpga实现的DA转换器
用fpga实现的DA转换器,有说明和源码,VDHL文件。
A PLD Based Delta-Sigma DAC
Delta-Sigma modulation is the simple, yet powerful,
technique responsible for the extraordinary
performance and low cost of today s audio CD
players. The simplest Delta-Sigma DAC consists of a
Delta-Sigma modulator and a one ...