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单片机开发 // This program measures the voltage on an external ADC input and prints the // result to a termin

// This program measures the voltage on an external ADC input and prints the // result to a terminal window via the UART. // // The system is clocked using the internal 24.5MHz oscillator. // Results are printed to the UART from a loop with the rate set by a delay // based on Timer 2. This loop p ...
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Linux/Unix编程 序列对齐 Compare a protein sequence to a protein sequence database or a DNA sequence to a DNA sequenc

序列对齐 Compare a protein sequence to a protein sequence database or a DNA sequence to a DNA sequence database using the Smith-Waterman algorithm.[.wat815.] \fCssearch3\fP is about 10-times slower than FASTA3, but is more sensitive for full-length protein sequence comparison.
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驱动编程 Also since the domain name--against which the retrieved domain name is to be matched--is currently h

Also since the domain name--against which the retrieved domain name is to be matched--is currently hard coded. Hence the hard coded name has to be change before compiling the user mode program The .lib file which has been provided in \DD\DD folder is checked built using Win XP DDK as of now.
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操作系统开发 ThreadX优秀的硬实时操作系统.This Express Start Guide is designed to help you install and use ThreadX for the

ThreadX优秀的硬实时操作系统.This Express Start Guide is designed to help you install and use ThreadX for the Motorola 68332 microprocessor using the Green Hills development suite. This guide, the readme.txt file on the distribution disk, and Chapter 2 of the ThreadX User Guide contain more detailed ...
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通讯/手机编程 The exercise should be finished in English. 2. According to Prof. Zhang s requirement, this exercis

The exercise should be finished in English. 2. According to Prof. Zhang s requirement, this exercise mainly focuses on the BER performance of some wireless communication system using specific coding and modulation type through the AWGN channel. Signal-to-Noise ration (SNR) varies from 5dB to 20dB.
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VHDL/FPGA/Verilog The purpose of this booklet is to give you a quick introduction to VHDL. This is done by informally

The purpose of this booklet is to give you a quick introduction to VHDL. This is done by informally describing the facilities provided by the language, and using examples to illustrate them. This booklet does not fully describe every aspect of the language. For such fine details, you should consult ...
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VHDL/FPGA/Verilog In this paper, a new method is introduced to implement chaotic generators based on the Henon map and

In this paper, a new method is introduced to implement chaotic generators based on the Henon map and Lorenz chaotic generators given by the state equations using the Field Programmable Gate Array (FPGA). The aim of this method is to increase the frequency of the chaotic generators. The new method is ...
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其他数据库 The goal of this library is to make ODBC recordsets look just like an STL container. As a user, you

The goal of this library is to make ODBC recordsets look just like an STL container. As a user, you can move through our containers using standard STL iterators and if you insert(), erase() or replace() records in our containers changes can be automatically committed to the database for you. The lib ...
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文件格式 This project aim was to build wireless software modem for data communication between two computers

This project aim was to build wireless software modem for data communication between two computers using an acoustic interface in the voice frequency range (20Hz– 20,000Hz). The transmitting antenna is a speaker (frequency response of: 90Hz – 20,000Hz) and the receiving antenna is a microphone (fr ...
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其他 This book uses the Python language to teach pro - gramming concepts and problem -solving skills,

This book uses the Python language to teach pro - gramming concepts and problem -solving skills, without assuming any previous program- ming experience. With easy-to-understand examples, pseudocode, flowcharts, and other tools, the student learns how to design the logic of programs and then implem ...
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