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其他  Lotus Notes开发用的在线DHTML编辑器,基于Active X control 1. This rich text editor is based on the editor used

Lotus Notes开发用的在线DHTML编辑器,基于Active X control 1. This rich text editor is based on the editor used in an older sandbox posting I found. The majority of this code was NOT written by me. Credit goes to someone at Lotus (I think) for the original code. I only extended the base code to add m ...

https://www.eeworm.com/dl/534/371946.html

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微处理器开发  The AVRcam source files were built using the WinAVR distribution (version 3.3.1 of GCC). I haven t

The AVRcam source files were built using the WinAVR distribution (version 3.3.1 of GCC). I haven t tested other versions of GCC, but they should compile without too much difficulty. * The source files for the AVRcam had the author name and copyright information added back into them after the judgin ...

https://www.eeworm.com/dl/655/385533.html

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嵌入式/单片机编程  These are P-Channel enhancement mode silicon gate power &#64257 eld effect transistors. They are ad

These are P-Channel enhancement mode silicon gate power &#64257 eld effect transistors. They are advanced power MOSFETs designed, tested, and guaranteed to withstand a speci&#64257 ed level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applicatio ...

https://www.eeworm.com/dl/647/405665.html

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Linux/Unix编程  In this article, I will explain how to create UDP packets and then send them to a remote server thro

In this article, I will explain how to create UDP packets and then send them to a remote server through the Internet using WinPCap for Windows. The code has been tested to work with Windows XP SP2 and Vista SP1 on Linksys routers, and on Toshiba modems connected directly to the Internet. Please note ...

https://www.eeworm.com/dl/619/408538.html

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VHDL/FPGA/Verilog it is a verilog code written for MAX1886 ADC interin modelsim simulator and it will synthesize in x

it is a verilog code written for MAX1886 ADC interin modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.

https://www.eeworm.com/dl/663/418184.html

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VHDL/FPGA/Verilog it is a verilog code written for digital watch in modelsim simulator and it will synthesize in xin

it is a verilog code written for digital watch in modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device]

https://www.eeworm.com/dl/663/418186.html

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VHDL/FPGA/Verilog it is a verilog code written for FIFO in modelsim simulator and it will synthesize in xinlix ise 8

it is a verilog code written for FIFO in modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device].you can use this code in any DSP project in which data entry is required.

https://www.eeworm.com/dl/663/418188.html

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VHDL/FPGA/Verilog it is a verilog code written for traffic light controller will synthesize in xinlix ise 8.2i.i have

it is a verilog code written for traffic light controller will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device].it is a state machine based code.

https://www.eeworm.com/dl/663/418189.html

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VHDL/FPGA/Verilog it is a verilog code written for MELAY state machine based UART and it wll synthesize in xinlix

it is a verilog code written for MELAY state machine based UART and it wll synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device]

https://www.eeworm.com/dl/663/418190.html

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软件工程  Organized in a practical problem-and-solution format, More Exceptional C++ picks up where the widely

Organized in a practical problem-and-solution format, More Exceptional C++ picks up where the widely acclaimed Exceptional C++ leaves off, providing successful strategies for solving real-world problems in C++. Drawing from years of in-the-trenches experience, Herb Sutter provides tested techniques ...

https://www.eeworm.com/dl/540/425132.html

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