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软件设计/软件工程 GPIO (General Purpose Input and Output ports) with microprocessor programmable tri-state bus interfa
GPIO (General Purpose Input and Output ports) with microprocessor programmable tri-state bus interface
其他 Jh_cpu is a cpu with 12 address,8 data bus, adn give direct address ,indirect address two addressin
Jh_cpu is a cpu with 12 address,8 data bus, adn give direct address ,indirect address two addressin way.
系统设计方案 LLRF CONTROL SYSTEM USING A COMMERCIAL BOARD for PCI BUS capture date
LLRF CONTROL SYSTEM USING A COMMERCIAL BOARD for PCI BUS capture date
通讯编程文档 The SL11RIDE is a low cost, high speed Universal Serial Bus RISC based Controller board. It contains
The SL11RIDE is a low cost, high speed Universal Serial Bus RISC based Controller board. It contains a
16-bit RISC processor with built in SL11RIDE ROM to greatly reduce firmware development efforts. Its
serial flash EEPROM interface offers low cost storage for USB device configuration and customer ...
其他嵌入式/单片机内容 This file contains routines to write to and read from the I2C bus using the GPIO pins of the CS5530
This file contains routines to write to and read from the I2C bus using the GPIO pins of the CS5530.
VHDL/FPGA/Verilog This is is a bridge IP core to interface the Tensilica PIF bus protocol with the OpenCores WishBone.
This is is a bridge IP core to interface the Tensilica PIF bus protocol with the OpenCores WishBone. It currently supports single-cycle as well as burst transfer operations. The core has been tested in a master-PIF slave-WB configuration.
VHDL/FPGA/Verilog pci pci转local bus总线的应用
pci pci转local bus总线的应用，使用IPcore
alter器件
通讯编程文档 Meter Bus protocol specification
Meter Bus protocol specification
其他 this is a vhdl code for a bus
this is a vhdl code for a bus
软件工程 pci description.the entire details regarding the pci bus
pci description.the entire details regarding the pci bus