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电子书籍 A salient-boundary extraction software package based on the paper: S. Wang, T. Kubota, J. M. Siskind
A salient-boundary extraction software package based on the paper: S. Wang, T. Kubota, J. M. Siskind, J. Wang. Salient Closed Boundary Extraction with Ratio Contour, IEEE Transactions on Pattern Analysis and Machine Intelligence, 27(4):546-561, 2005
matlab例程 The software is capable to simulate space time code [1] for QPSK modulation using different number o
The software is capable to simulate space time code [1] for QPSK modulation using different number of state. Examples of generator matrix up to 256 stetes are provided. Variable signal to noise ratio (SNR) might be applied to produce bit error rate (BER) or frame error rate (FER) curves.
压缩解压 老外的超高效率压缩
老外的超高效率压缩，High efficient Data Compression Library for use with Delphi.
Support Rank, ZIP, BZIP and PPM compression algorithms.
Compression ratio more than 1.5-2 times better than ZIP/RAR archiver.
Compression speed up to 8 Mb/sec (on PIII-600).
无线通信 香农公式和不同天线数下mimo的信道容量
资料仿真了瑞利信道下4*4 MIMO的ergodic capacity, 解码端，MMSE接收端采用SIC和不采用SIC的仿真
I) Achievable capacity vs SNR for all schemes
II) Ratio of Acvhievable capacity of each receiver to the MIMO capacity
软件设计/软件工程 This paper studies the problem of categorical data clustering, especially for transactional data ch
This paper studies the problem of categorical data clustering,
especially for transactional data characterized by high
dimensionality and large volume. Starting from a heuristic method
of increasing the height-to-width ratio of the cluster histogram, we
develop a novel algorithm – CLOPE, which is v ...
技术资料 ML101J21激光二极管数据手册
ML101J21激光二极管数据手册，•High Output Power: 160mW (Pulse)
• High Efficiency: 0.95 W/A ( typ.)
• Visible Light: 658nm (typ.)
• Low Aspect Ratio (q^ / q//): 1.8 (typ.)
• Low Astigmatic Distance: 1mm (typ.)
其他 SD card controller can just read data using 1 bit SD mode. I have written this core for NIOS2 CPU,
SD card controller can just read data using 1 bit SD mode.
I have written this core for NIOS2 CPU, Cyclone, but I think it can works
with other FPGA or CPLD. Better case for this core is SD clock = 20 MHz and
CPU clock = 100 MHz (or in the ratio 1:5). If you have a wish you can achieve this core.
Go ...
书籍 Propagation Channel Characterization
The investigation of the propagation channel is becoming more and more important in mod-
ern wireless communication. The demand for spectral efficiency motivates exploitation of
all channels that can possibly be used for communications. Nowadays, a common trend for
designing physical layer algorithm ...
技术资料 PCIE3.0/4.0接收端（RX）介绍及其测试解决方案
• PCIe 3.0 introduced formal Rx testing• Based on stress testing of the DUT in loopback◦ Looped back data must be the same as stressed data• DUT must support loopback initialization and training• Impairments in stress must be controlled and repeatable• DUT must receive stressed signals without ...
嵌入式/单片机编程 A digital fi‘equeney meter designed with FPGA development software Q-~us 11 is introduced．The 1 Hz—l
A digital fi‘equeney meter designed with FPGA development software Q-~us 11 is introduced．The 1 Hz—l MHz input measured pulse signals of the digital ii‘equency meter can be used for measuring frequency，period，pulse width and duty ratio，etc．The test results stably display O71 3 seven—segment ...