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可编程逻辑 WP247 - Virtex-5系列高级封装

The exacting technological demands created byincreasing bandwidth requirements have given riseto significant advances in FPGA technology thatenable engineers to successfully incorporate highspeedI/O interfaces in their designs. One aspect ofdesign that plays an increasingly important role isthat o ...
https://www.eeworm.com/dl/kbcluoji/40072.html
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可编程逻辑 xilinx Zynq-7000 EPP产品简介

The Xilinx Zynq-7000 Extensible Processing Platform (EPP) redefines the possibilities for embedded systems, giving system and software architects and developers a flexible platform to launch their new solutions and traditional ASIC and ASSP users an alternative that aligns with today’s progr ...
https://www.eeworm.com/dl/kbcluoji/40119.html
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可编程逻辑 Verilog编码中的非阻塞性赋值

  One of the most misunderstood constructs in the Verilog language is the nonblockingassignment. Even very experienced Verilog designers do not fully understand how nonblockingassignments are scheduled in an IEEE compliant Verilog simulator and do not understand whenand why nonblocking assi ...
https://www.eeworm.com/dl/kbcluoji/40125.html
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可编程逻辑 通信的数学理论

The fundamental problem of communication is that of reproducing at one point either exactly or approximately a message selected at another point. Frequently the messages have meaning; that is they refer to or are correlated according to some system with certain physical or conceptual entities.
https://www.eeworm.com/dl/kbcluoji/40145.html
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可编程逻辑 Design Safe Verilog State Machine(Synplicity)

  One of the strengths of Synplify is the Finite State Machine compiler. This is a powerfulfeature that not only has the ability to automatically detect state machines in the sourcecode, and implement them with either sequential, gray, or one-hot encoding. But alsoperform a reachability ana ...
https://www.eeworm.com/dl/kbcluoji/40146.html
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可编程逻辑 VHDL,Verilog,System verilog比较

  本文简单讨论并总结了VHDL、Verilog,System verilog 这三中语言的各自特点和区别As the number of enhancements to variousHardware Description Languages (HDLs) hasincreased over the past year, so too has the complexityof determining which language is best fora particular design. Many designers ...
https://www.eeworm.com/dl/kbcluoji/40147.html
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可编程逻辑 CPLD和FPGA设计介绍

Field Programmable Gate Arrays (FPGAs) are becoming a critical part of every system design. Many vendors offer many different architectures and processes. Which one is right for your design? How do you design one of these so that it works correctly and functions as you expect in your entire system ...
https://www.eeworm.com/dl/kbcluoji/40148.html
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可编程逻辑 基于FPGA的光纤光栅解调系统的研究

 波长信号的解调是实现光纤光栅传感网络的关键,基于现有的光纤光栅传感器解调方法,提出一种基于FPGA的双匹配光纤光栅解调方法,此系统是一种高速率、高精度、低成本的解调系统,并且通过引入双匹配光栅有效地克服了双值问题同时扩大了检测范围。分析了光纤光栅的测温原理并给出了该方案软硬件设计,综合考虑系统的解 ...
https://www.eeworm.com/dl/kbcluoji/40240.html
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可编程逻辑 Virtex-5 GTP Transceiver Wizar

The LogiCORE™ GTP Wizard automates the task of creating HDL wrappers to configure the high-speed serial GTP transceivers in Virtex™-5 LXT and SXT devices. The menu-driven interface allows one or more GTP transceivers to be configured using pre-definedtemplates for popular industry standa ...
https://www.eeworm.com/dl/kbcluoji/40376.html
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测试测量 微电脑型RS-485显示电表(24*48mm/48*96mm)

微电脑型RS-485显示电表(24*48mm/48*96mm) 特点: 5位数RS-485显示电表 显示范围-19999-99999位數 通訊协议Modbus RTU模式 宽范围交直流兩用電源設計 尺寸小,穩定性高 主要规格: 显示范围:-19999~99999 digit RS-485传输速度: 19200/9600/4800/2400 selective RS-485通讯位址: "01"-"FF" RS-485通讯协议: Modbus RTU mod ...
https://www.eeworm.com/dl/544/41698.html
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