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ARM LPC315x系列ARM微控制器用户手册
The NXP LPC315x combine an 180 MHz ARM926EJ-S CPU core, High-speed USB 2.0OTG, 192 KB SRAM, NAND flash controller, flexible external bus interface, an integratedaudio codec, Li-ion charger, Real-Time Clock (RTC), and a myriad of serial and parallelinterfaces in a single chip targeted at consumer, in ...
技术书籍 时钟恢复设计_英文版
Today in many applications such as network switches, routers, multi-computers,and processor-memory interfaces, the ability to integrate hundreds of multi-gigabit I/Os is desired to make better use of the rapidly advancing IC technology.
开发工具 H-JTAG调试软件下载
ARM通讯
H-JTAG 是一款简单易用的的调试代理软件,功能和流行的MULTI-ICE 类似。H-JTAG 包括两个工具软件:H-JTAG SERVER 和H-FLASHER。其中,H-JTAG SERVER 实现调试代理的功能,而H-FLASHER则实现了FLASH 烧写的功能。H-JTAG 的基本结构如下图1-1所示。 H-JTAG支持所有基于ARM7 和ARM9的芯片的调试,并且支持大 ...
开发工具 如何仿真IP核(建立modelsim仿真库完整解析)
IP核生成文件:(Xilinx/Altera 同)
IP核生成器生成 ip 后有两个文件对我们比较有用,假设生成了一个 asyn_fifo 的核,则asyn_fifo.veo 给出了例化该核方式(或者在 Edit-》Language Template-》COREGEN 中找到verilog/VHDL 的例化方式)。asyn_fifo.v 是该核的行为模型,主要调用了 xilinx 行为模型库的模块 ...
可编程逻辑 Xilinx UltraScale:新一代架构满足您的新一代架构需求(EN)
中文版详情浏览:http://www.elecfans.com/emb/fpga/20130715324029.html
Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture
The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class ...
可编程逻辑 AXI总线功能模块v1.1产品简介(英文资料)
AXI Bus Functional Model v1.1 Product Brief.pdf
可编程逻辑 采用TÜV认证的FPGA开发功能安全系统
This white paper discusses how market trends, the need for increased productivity, and new legislation have
accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is
changing the paradigms of safety designs and will greatly reduce development e ...
可编程逻辑 《器件封装用户向导》赛灵思产品封装资料
Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes a ...
可编程逻辑 XAPP144 -设计CPLD多电压系统
Today’s digital systems combine a myriad of chips with different voltage configurations.Designers must interface 2.5V processors with 3.3V memories—both RAM and ROM—as wellas 5V buses and multiple peripheral chips. Each chip has specific power supply needs. CPLDsare ideal for han ...
可编程逻辑 WP151 - Xilinx FPGA的System ACE配置解决方案
Design techniques for electronic systems areconstantly changing. In industries at the heart of thedigital revolution, this change is especially acute.Functional integration, dramatic increases incomplexity, new standards and protocols, costconstraints, and increased time-to-market pressureshave bo ...