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matlab例程 Multiplicative cascade model
Multiplicative cascade model
通讯/手机编程 The IEEE Multipath Channel block simulates an indoor UWB channel as described in "A Channel Model fo
The IEEE Multipath Channel block simulates an indoor UWB channel as described in "A Channel Model for Ultrawideband Indoor
Java书籍 Software developers need to have a number of traits in order to practice their craft well. First, t
Software developers need to have a number of traits in order to practice their
craft well. First, they must be good analytical thinkers and problem solvers. A
developer’s primary role is to create software that solves business problems.
This requires analyzing customer needs and coming up with succ ...
VC书籍 “The Component Object Model Specification” ,Microsoft Corp. ,1995. com规范
“The Component Object Model Specification” ,Microsoft Corp. ,1995.
com规范，微软出版。
DSP编程 for the TI dm6446 platformBackground subtraction moduleMaintain a background model, which can distin
for the TI dm6446 platformBackground subtraction moduleMaintain a background model, which can distinguish background, foreground and theft/left pixelsShadow removal moduleDetect shadow regions in monochrome videosCamera shift detection and suppression moduleDetect of small camera shift, and suppress ...
电子书籍 This document contains a description of the CAN Reference Model. This document is part of a set of
This document contains a description of the CAN Reference Model. This document is
part of a set of documents that standardize the CAN Application Layer for Industrial
Applications.
其他书籍 中文版Programming the Microsoft Windows Driver Model
中文版Programming the Microsoft Windows Driver Model，写的很好的书，翻译的也不错
matlab例程 These Simulink blocks contain transfer functions that model the pressure and flow transients for axi
These Simulink blocks contain transfer functions that model the pressure and flow transients for axisymmetric 2D viscous flow of a compressible fluid in a straight rigid circular cross section pipelines. Three models are available:
(1) pressures at the ends
(2) flow rates at the ends
(3) pressure ...
VHDL/FPGA/Verilog Synthesizable FIFO Model This example describes a synthesizable implementation of a FIFO. The FIFO
Synthesizable FIFO Model
This example describes a synthesizable implementation of a FIFO. The FIFO depth and FIFO width in bits can be modified by simply changing the value of two parameters, `FWIDTH and `FDEPTH. For this example, the FIFO depth is 4 and the FIFO width is 32 bits.
其他 Inside the C++ Object Model
Inside the C++ Object Model