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教程资料 WP409利用Xilinx FPGA打造出高端比特精度和周期精度浮点DSP算法实现方案
WP409利用Xilinx FPGA打造出高端比特精度和周期精度浮点DSP算法实现方案：
High-Level Implementation of Bit- and Cycle-Accurate Floating-Point DSP Algorithms with Xilinx FPGAs
可编程逻辑 WP409利用Xilinx FPGA打造出高端比特精度和周期精度浮点DSP算法实现方案
WP409利用Xilinx FPGA打造出高端比特精度和周期精度浮点DSP算法实现方案：
High-Level Implementation of Bit- and Cycle-Accurate Floating-Point DSP Algorithms with Xilinx FPGAs
Windows CE Embedded Windows CE SAPI 5.0 Developers Kit is an embedded speech recognition, or speech-to-text cir
Embedded Windows CE SAPI 5.0 Developers Kit is an embedded speech recognition, or speech-to-text circuit solution, for development of speech recognition system at the electronics level. 一款很好的英文嵌入式语音识别系统，基于winCE的，欢迎试用！
金融证券系统 // chebysheve outlier detection // this function is used to detect the abnormal value among a set o
// chebysheve outlier detection
// this function is used to detect the abnormal value among a set of data
// input:
// delta: a set of data
// flag: discribe which data is already known as outlier
// p: restrict level
// output:
// double[] door : byyond which the data may be considered as a outlie ...
其他 自己写的是用于所有VC开发平台和linux平台软件开发的trace功能函数。可自定module,evel, 系统时间开关
自己写的是用于所有VC开发平台和linux平台软件开发的trace功能函数。可自定module,evel, 系统时间开关，trace开关，trace level开关，输出log 到文件，trace 存储文件的大小。。。
软件设计/软件工程 ImpulseC Codeveloper fft code. This file implements the hardware portion of a 256 sample FFT using a
ImpulseC Codeveloper fft code. This file implements the hardware portion of a 256 sample FFT using a radix-4 algorithm. This implementation demonstrates that results similar to hand-coded HDL can be achieved
using the C language, and without using a low-level style of C code.
VHDL/FPGA/Verilog This short paper will give you some VHDL code examples that will help you design synchronous circuit
This short paper will give you some VHDL code examples that will help you design synchronous circuits that work first time.The philosophy behind Ten-Commandment code is that synthesizers are not to be trusted too much. Most of the code you will see is close to the structural level some more overtly ...
技术资料 基于单片机的电容式液位传感器参数测量
设计制作了符合实验教学要求的电容式液位传感器参数测量实验.通过555定时器构成的多谐振荡器,将电容信号转变为脉冲信号频率的变化,输给单片机进行实时检测并计算出液位高度,触发相应功能电路进行液位显示和报警.设计了传感器测量电路模块﹑多谐振荡器电路模块﹑键盘与显示电路模块﹑电源电路模块以及软件程序,学生可根据具 ...
书籍 Introduction_to_Dynamic_Systems
This book  is  an outgrowth of a course developed at Stanford University over
the past  five  years. It  is  suitable as a self-contained textbook for second-level
undergraduates  or  for first-level graduate students in almost every field that
employs quantit ...
VHDL/FPGA/Verilog What is Verilog? ➥ Verilog HDL is a Hardware Description Language (HDL) ➥ Verilog HDL
What is Verilog?
&#10149 Verilog HDL is a Hardware Description Language (HDL)
&#10149 Verilog HDL allows describe designs at a high level of
abstraction as well as the lower implementation levels
&#10149 Primary use of HDLs is the simulation of designs
&#10149 Verilog is a discrete event time simula ...