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Java编程 是一本介绍java基础应用的好书 Java For Artists targets both the undergraduate computer science or information te
是一本介绍java基础应用的好书
Java For Artists targets both the undergraduate computer science or information technology student and the practicing programmer. It is both an introductory-level textbook and trade book.
As a textbook it employs learning objectives, skill-building exercises, suggested ...
其他书籍 用VB编写DirectX7.0游戏 DirectX7.0终于出现了
用VB编写DirectX7.0游戏
DirectX7.0终于出现了，同前面DirectX6相同，版本7也带了一个庞大（129M）的SDK开发库，同DirectX6 SDK库相比，DirectX7的SDK库提供了以下新的功能：
＊ 对于Visual Basic的支持。用户可以使用类库在Visual Basic环境下开发基于DirectX的程序。
＊ 提供更多DirectX3D立即模式（Immediat ...
电子书籍 With a worldwide community of users and more than a million dedicated programmers, Perl has proven t
With a worldwide community of users and more than a million dedicated programmers, Perl has proven to be the most effective language for the latest trends in computing and business. Every programmer must keep up with the latest tools and techniques. This updated version of Advanced Perl Programming ...
其他书籍 A few short years ago, the applications for video were somewhat confined—analog was used for broad
A few short years ago, the applications for
video were somewhat confined—analog was
used for broadcast and cable television, VCRs,
set-top boxes, televisions and camcorders.
Since then, there has been a tremendous and
rapid conversion to digital video, mostly based
on the MPEG-2 video compression s ...
VHDL/FPGA/Verilog Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGH
Top module name : SHIFTER (File name : SHIFTER.v)
2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT.
3. Output pins: OUT [15:0].
4. Input signals generated from test pattern are latched in one cycle and are
synchronized at clock rising edge.
5. The SHIFT signal describes the shift number. The shift ...
VHDL/FPGA/Verilog Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGH
Top module name : SHIFTER (File name : SHIFTER.v)
2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT.
3. Output pins: OUT [15:0].
4. Input signals generated from test pattern are latched in one cycle and are
synchronized at clock rising edge.
5. The SHIFT signal describes the shift number. The shift ...
其他书籍 The MIPS32® 4KEm™ core from MIPS® Technologies is a member of the MIPS32 4KE™ proc
The MIPS32&#174 4KEm&#8482 core from MIPS&#174 Technologies is a member of the MIPS32 4KE&#8482 processor core family. It is a
high-performance, low-power, 32-bit MIPS RISC core designed for custom system-on-silicon applications. The core is
designed for semiconductor manufacturing companies, ASIC d ...
数学计算 C 开发的有限元软件
C 开发的有限元软件，界面还可以，不错，可以试试。 FElt is a free system for introductory level finite element analysis. It is
primarily intended as a teaching tool for introductory type courses in finite
elements - probably in the mechanical/structural/civil fields. In a command
line environment, ...
其他 This approach addresses two difficulties simultaneously: 1) the range limitation of mobile robot se
This approach addresses two difficulties simultaneously: 1)
the range limitation of mobile robot sensors and 2) the difficulty of detecting buildings in
monocular aerial images. With the suggested method building outlines can be detected
faster than the mobile robot can explore the area by itself, g ...
matlab例程 PRINCIPLE: The UVE algorithm detects and eliminates from a PLS model (including from 1 to A componen
PRINCIPLE: The UVE algorithm detects and eliminates from a PLS model (including from 1 to A components) those variables that do not carry any relevant information to model Y. The criterion used to trace the un-informative variables is the reliability of the regression coefficients: c_j=mean(b_j)/std ...