搜索：How - 虫虫下载站

可编程逻辑  XAPP452-Spartan-3高级配置架构

This application note provides a detailed description of the Spartan&trade;-3 configurationarchitecture. It explains the composition of the bitstream file and how this bitstream isinterpreted by the configuration logic to program the part. Additionally, a methodology ispresented that will guide th ...

https://www.eeworm.com/dl/kbcluoji/40052.html

下载: 63

查看: 1033

可编程逻辑  XAPP228 -Virtex器件内的四端口存储器

This application note describes how the existing dual-port block memories in the Spartan&trade;-IIand Virtex&trade; families can be used as Quad-Port memories. This essentially involves a dataaccess time (halved) versus functionality (doubled) trade-off. The overall bandwidth of the blockmemory in ...

https://www.eeworm.com/dl/kbcluoji/40055.html

下载: 151

查看: 1046

可编程逻辑  XAPP122 - Spartan-XL FPGA的Express配置

Express Mode uses an 8-bit wide bus path for fast configuration of Xilinx FPGAs. Thisapplication note provides information on how to perform Express configuration specifically forthe Spartan&trade;-XL family. The Express mode signals and their associated timing are defined.The steps of Express con ...

https://www.eeworm.com/dl/kbcluoji/40057.html

下载: 135

查看: 1042

可编程逻辑  XAPP098 - Spartan FPGA低成本、高效率串行配置

This application note shows how to achieve low-cost, efficient serial configuration for Spartan FPGA designs. The approachrecommended here takes advantage of unused resources in a design, thereby reducing the cost, part count, memory size,and board space associated with the serial configuration ci ...

https://www.eeworm.com/dl/kbcluoji/40059.html

下载: 72

查看: 1094

可编程逻辑  XAPP143-利用Verilog来创建CPLD设计

This Application Note covers the basics of how to use Verilog as applied to ComplexProgrammable Logic Devices. Various combinational logic circuit examples, such asmultiplexers, decoders, encoders, comparators and adders are provided. Synchronous logiccircuit examples, such as counters and state m ...

https://www.eeworm.com/dl/kbcluoji/40069.html

下载: 156

查看: 1048

可编程逻辑  WP401-FPGA设计的DO-254

The standard that governs the design of avioniccomponents and systems, DO-254, is one of the mostpoorly understood but widely applicable standardsin the avionic industry. While information on thegeneral aspects of the standard is easy to obtain, thedetails of exactly how to implement the standard ...

https://www.eeworm.com/dl/kbcluoji/40071.html

下载: 23

查看: 1054

可编程逻辑  XAPP806 -决定DDR反馈时钟的最佳DCM相移

This application note describes how to build a system that can be used for determining theoptimal phase shift for a Double Data Rate (DDR) memory feedback clock. In this system, theDDR memory is controlled by a controller that attaches to either the OPB or PLB and is used inan embedded microproces ...

https://www.eeworm.com/dl/kbcluoji/40078.html

下载: 52

查看: 1028

可编程逻辑  XAPP944 - 将Xilinx CoolRunner-II CPLD用作数据流开关

&nbsp; This application note shows how a Xilinx CoolRunnerTM-II CPLD can be used as a simplelogical switch that can quickly and reliably select between different MPEG video sources. Thesource code for the design is available on the Xilinx website, and is linked from the &ldquo;VHDLCode&rdquo; se ...

https://www.eeworm.com/dl/kbcluoji/40092.html

下载: 24

查看: 1121

可编程逻辑  Verilog编码中的非阻塞性赋值

&nbsp; One of the most misunderstood constructs in the Verilog language is the nonblockingassignment. Even very experienced Verilog designers do not fully understand how nonblockingassignments are scheduled in an IEEE compliant Verilog simulator and do not understand whenand why nonblocking assi ...

https://www.eeworm.com/dl/kbcluoji/40125.html

下载: 79

查看: 1029

可编程逻辑  PLD对FPGA数据加密

SRAM-based FPGAs are non-volatile devices. Upon powerup, They are required to be programmed from an external source. This procedure allows anyone to easily monitor the bit-stream, and clone the device. The problem then becomes how can you effectively protect your intellectual property from others ...

https://www.eeworm.com/dl/kbcluoji/40127.html

下载: 187

查看: 1036

搜索结果

按分类筛选