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VHDL/FPGA/Verilog Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGH
Top module name : SHIFTER (File name : SHIFTER.v)
2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT.
3. Output pins: OUT [15:0].
4. Input signals generated from test pattern are latched in one cycle and are
synchronized at clock rising edge.
5. The SHIFT signal describes the shift number. The shift ...
其他 M3GExport enables developers to export complex 3D animated scenes from Maya® directly to Mobile 3
M3GExport enables developers to export complex 3D animated scenes from Maya&reg directly to Mobile 3D Graphics file format (M3G), the emerging 3D file format for mobile 3D games.
Created by the developers of JBenchmark3D - the leading performance measurement tool for mobile 3D graphics, M3GExport l ...
技术管理 一篇关于TCP-Vegas的文献:Vegas is an implementation of TCP that achieves between 37 and 71％ better throughpu
一篇关于TCP-Vegas的文献:Vegas is an implementation of TCP that achieves between 37 and 71％ better throughput on the Internet, with onefifth to one-half the losses, as compared to the implementation of TCP in the Reno distribution of BSD Unix. This paper motivates and describes the three key techniq ...
DSP编程 The TMS320C54x, TMS320LC54x, and TMS320VC54x fixed-point, digital signal processor (DSP) families (
The TMS320C54x, TMS320LC54x, and TMS320VC54x fixed-point, digital signal processor (DSP) families
(hereafter referred to as the ’54x unless otherwise specified) are based on an advanced modified Harvard
architecture that has one program memory bus and three data memory buses. These processors also ...
matlab例程 螺旋桨PID控制 In response to constant pressure to design more efficient, faster, smaller, and better sys
螺旋桨PID控制
In response to constant pressure to design more efficient, faster, smaller, and better systems, engineers are constantly looking for ways to improve existing designs or replace them with better ones. Facing large fuel costs, the aerospace industry in particular has been researching alt ...
单片机开发 The DHRY program performs the dhrystone benchmarks on the 8051. Dhrystone is a general-performanc
The DHRY program performs the dhrystone benchmarks on the 8051.
Dhrystone is a general-performance benchmark test originally
developed by Reinhold Weicker in 1984. This benchmark is
used to measure and compare the performance of different
computers or, in this case, the efficiency of the code
gener ...
书籍源码 MATLAB Code for Optimal Quincunx Filter Bank Design Yi Chen July 17, 2006 This file introduces t
MATLAB Code for Optimal Quincunx Filter
Bank Design
Yi Chen
July 17, 2006
This file introduces the MATLAB code that implements the two algorithms (i.e., Algorithms
1 and 2 in [1], or Algorithms 4.1 and 4.2 in [2]) used for the construction of
quincunx filter banks with perfect reconstruction, linear ...
VHDL/FPGA/Verilog DDR SDRAM控制器的VHDL源代码
DDR SDRAM控制器的VHDL源代码，含详细设计文档。
The DDR, DCM, and SelectI/O&#8482 features in the Virtex&#8482 -II architecture make it the perfect
choice for implementing a controller of a Double Data Rate (DDR) SDRAM. The Digital Clock
Manager (DCM) provides the required Delay Locked Loop (DLL), Dig ...
DSP编程 The SL74HC573 is identical in pinout to the LS/ALS573. The device inputs are compatible with standa
The SL74HC573 is identical in pinout to the LS/ALS573. The device
inputs are compatible with standard CMOS outputs with pullup
resistors, they are compatible with LS/ALSTTL outputs.
These latches appear transparent to data (i.e., the outputs change
asynchronously) when Latch Enable is high. When Lat ...
驱动编程 I want to provide an example file system driver for Windows NT/2000/XP. For some time I have worked
I want to provide an example file system driver for Windows NT/2000/XP. For some time I have worked on an implementation of RomFs. RomFs is a small filesystem originally implemented in Linux, because of its simple disk layout its a good choice for an example driver. The current status is a working r ...