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压缩解压 The two C source files in this archive are specific to the TRS-80 Model 4 with high-resolution grap
The two C source files in this archive are specific to the TRS-80 Model 4 with
high-resolution graphics board. However, the code which performs Huffman enco-
ding and decoding is of general interest.
软件设计/软件工程 Software Engineering is a discipline applied by teams to produce high-quality, large-scale, cost-eff
Software Engineering is a discipline applied by teams to produce high-quality, large-scale, cost-effective software that satisfies the users’ needs, and can be maintained over time
Software Development is a weaker term where standards, tools, processes, etc. may not be applied
DSP编程 Interfacing AD7276 High-Speed Data Converters to ADSP-BF535 Blackfin Processors
Interfacing AD7276 High-Speed Data Converters to ADSP-BF535 Blackfin Processors
软件设计/软件工程 一些关于HLA(high level architecher)仿真程序设计的相关文章,
一些关于HLA(high level architecher)仿真程序设计的相关文章,
数据库系统 DataDraw is an ultra-fast persistent database for high performance programs written in C. It s so fa
DataDraw is an ultra-fast persistent database for high performance programs written in C. It s so fast that
many programs keep all their data in a DataDraw database, even whi le being manipulated in inner loop s
of compute intensive appl ications.
驱动编程 HIGH_SPEED_USB_To_ATA(IDE)Firmware相关代码（EZ USB FX2芯片）
HIGH_SPEED_USB_To_ATA(IDE)Firmware相关代码（EZ USB FX2芯片）
Java编程 This the first release (version 0.0) of the Peersim high level P2P network simulator. This archi
This the first release (version 0.0) of the Peersim
high level P2P network simulator.
This archive contains the javadoc generated documentation,
and a java archive containing the simulator source and bytecode
and some examples.
其他 10MS/s USB-2.0 ("high speed") oscilloscope with two 8 bit sampling inputs
10MS/s USB-2.0 ("high speed") oscilloscope with two 8 bit sampling inputs
USB编程 High volume USB 2.0 devices will be designed using ASIC technology with embedded USB 2.0 support. F
High volume USB 2.0 devices will be designed using ASIC technology with embedded USB 2.0 support.
For full-speed USB devices the operating frequency was low enough to allow data recovery to be handled
in a vendors VHDL code, with the ASIC vendor providing only a simple level translator to meet the U ...
VHDL/FPGA/Verilog High volume USB 2.0 devices will be designed using ASIC technology with embedded USB 2.0 support. F
High volume USB 2.0 devices will be designed using ASIC technology with embedded USB 2.0 support.
For full-speed USB devices the operating frequency was low enough to allow data recovery to be handled
in a vendors VHDL code, with the ASIC vendor providing only a simple level translator to meet the U ...