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技术资料 DM74LS564.pdf
英文描述： Octal D-Type Flip-Flop with TRI-STATE Outputs
中文描述： 八路D类触发器触发器与三态输出
技术资料 74LS374.pdf
英文描述： Octal D-type Edge-triggered Flip-Flips(with three-state outputs)
中文描述： 八路D型边沿触发器翻转（三态输出）
资料/手册 74LS73.pdf
英文描述： Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs
中文描述： 双下降沿触发主从JK触发器明确和互补输出
技术资料 74LS73.pdf
英文描述： Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs
中文描述： 双下降沿触发主从JK触发器明确和互补输出
技术资料 Allegro/APD 如何作出多张的B/B via钻孔图
Allegro/APD 如何作出多张的B/B via 钻孔图前言:在Flip Chip 或HDI 的PCB 设计,必需作出多张的钻孔图,但Allegro/APD 的Ncdrill
技术资料 PLC42VA12 可编程逻辑门器件用作DMA控制器设计的SNAP文件的介绍
PLC42VA12 可编程逻辑门器件用作DMA控制器设计的SNAP文件的介绍
The PLC42VA12 contains 10 flip-fl
技术资料 74LS373.pdf
英文描述： TRI-STATEE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops
中文描述： 三STATEE八路D类透明锁存器和边沿触发触发器
技术资料 Virtex-II Platform FPGAs
Module 1:
Introduction and Overview
7 pages
• Summary of Features
• General Description
• Architecture
• Device/Package Combinations and Maximum I/O
• Ordering Examples
Module 2:
Functional Description
41 pages
• Detailed Description
- Input/Output Blocks (IOBs)
- Digitally Controlled Impedanc ...
GPS编程 The objective of this projectis to design, model and simulate an autocorrelation generator circuit
The objective of this projectis to design, model and simulate an autocorrelation
generator circuit using 4-bit LFSR. the register and LFSR will used D flip-flop and some
gates. By the autocorrelation concept, there should be 2 same length vectors, for calculating
the autocorrelation , we have to des ...
其他 with this rar file i am sending five source codes in vhdl for xor gate,xor gate using tristae gate,e
with this rar file i am sending five source codes in vhdl for xor gate,xor gate using tristae gate,electronic voting machine,mod 16 counter,jk flip flop.please accept these codes and make me member of this site.so that i can download code from this site also.i really needed codes please accept that ...