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单片机开发 A major goal of this book is to show to make devices that are inherently reliable by design. While a
A major goal of this book is to show to make devices that are inherently reliable by design. While a lot of attention has been given to “quality improvement,” the majority of the emphasis has been placed on the processes that occur after the design of a product is complete. Design deficiencies are ...
单片机编程 基于8086 CPU 的单芯片计算机系统的设计
本文依据集成电路设计方法学，探讨了一种基于标准Intel 8086 微处理器的单芯片计算机平台的架构。研究了其与SDRAM，8255 并行接口等外围IP 的集成，并在对AMBA协议和8086 CPU分析的基础上，采用遵从AMBA传输协议的系统总线代替传统的8086 CPU三总线结构，搭建了基于8086 IP 软核的单芯片计算机系统，并实现了FPGA 功能演示 ...
教程资料 采用TÜV认证的FPGA开发功能安全系统
This white paper discusses how market trends, the need for increased productivity, and new legislation have
accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is
changing the paradigms of safety designs and will greatly reduce development e ...
可编程逻辑 采用TÜV认证的FPGA开发功能安全系统
This white paper discusses how market trends, the need for increased productivity, and new legislation have
accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is
changing the paradigms of safety designs and will greatly reduce development e ...
中间件编程  The purpose of this lab is to introduce the concept of FSMs with a datapath, and to stud
&#65279 The purpose of this lab is to introduce the concept of FSMs with a datapath, and to
study the usage of more complex test benches. Also, we enforce a rudimentary design
methodology by assuming that the students are part of a bigger project, and have no
knowledge of VHDL-implementatio ...
电子书籍 The emphasis of this book is on real-time application of Synopsys tools, used to combat various pro
The emphasis of this book is on real-time application of Synopsys tools, used
to combat various problems seen at VDSM geometries. Readers will be
exposed to an effective design methodology for handling complex, submicron
ASIC designs. Significance is placed on HDL coding styles,
synthesis and optimi ...
USB编程 High volume USB 2.0 devices will be designed using ASIC technology with embedded USB 2.0 support. F
High volume USB 2.0 devices will be designed using ASIC technology with embedded USB 2.0 support.
For full-speed USB devices the operating frequency was low enough to allow data recovery to be handled
in a vendors VHDL code, with the ASIC vendor providing only a simple level translator to meet the U ...
VHDL/FPGA/Verilog High volume USB 2.0 devices will be designed using ASIC technology with embedded USB 2.0 support. F
High volume USB 2.0 devices will be designed using ASIC technology with embedded USB 2.0 support.
For full-speed USB devices the operating frequency was low enough to allow data recovery to be handled
in a vendors VHDL code, with the ASIC vendor providing only a simple level translator to meet the U ...
书籍 ESD - Failure Mechanisms and Models
Failure analysis is invaluable in the learning process of electrostatic discharge (ESD) and
electrical overstress (EOS) protection design and development [1–8]. In the failure analysis
of EOS, ESD, and latchup events, there are a number of unique failure analysis processes
andinformationthatcanprov ...
书籍 Neural_and_Fuzzy_Logic_Control
The idea of writing this book arose from the need to investigate the main principles of
modern power electronic control strategies, using fuzzy logic and neural networks, for
research and teaching. Primarily, the book aims to be a quick learning guide for
postgraduate/undergraduate students or desig ...