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HSSDRC IP core is the configurable universal SDRAM controller with adaptive bank control and adaptive command pipeline. HSSDRC IP core and IP core testbench has been written on SystemVerilog and has been tested in Modelsim. HSSDRC IP core is licensed under MIT License

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configurable controller universal adaptive

嵌入式/单片机编程  Simple program to control stepper motor using AVR atmega32 Microcontroller

Simple program to control stepper motor using AVR atmega32 Microcontroller

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Microcontroller program control stepper

文章/文档  two pole voltage switched PWM voltage control circuit in matlab&simulink

two pole voltage switched PWM voltage control circuit in matlab&simulink

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voltage switched simulink control

Windows Mobile The sample provided here is a simple control panel application that will just display the memory usa

The sample provided here is a simple control panel application that will just display the memory usage of the system using a message box. Windows Mobile

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application provided control display

单片机开发  This software is developed to provide ease with controller design. For PID control, options are give

This software is developed to provide ease with controller design. For PID control, options are given to design and analyse the compensated and uncompensated system. You are free to choice among Proportional PI, PD and PID mode of control. Both frequency and time domain characteristics can be ob ...

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controller developed software control

其他行业  optailpiduse of the model reference adaptive control method! Lypanuov stability theory used to desig

optailpiduse of the model reference adaptive control method! Lypanuov stability theory used to design Parameter adjustment

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optailpiduse reference stability adaptive

USB编程  Control 8 relay from usb port. program in VBasic for HID board

Control 8 relay from usb port. program in VBasic for HID board

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Control program VBasic relay

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嵌入式/单片机编程  Voice Recoder Chip Control ISD2560 MCU:ATMega8

文件格式  A Stable Self-Tuning Fuzzy Logic Control System for Industrial Temperature Regulation

文件格式  svpwm technique as a control stratergy for more efficient and less harmonic operation of motors.

VHDL/FPGA/Verilog HSSDRC IP core is the configurable universal SDRAM controller with adaptive bank control and adaptiv