搜索：Clock
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- 技术资料 (152)
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https://www.eeworm.com/dl/905954.html
技术资料
7290a.rar
本模拟I2C软件包包含了I2C操作的底层子程序，使用前要定义
好SCL和SDA。在标准8051模式(12 Clock)下
https://www.eeworm.com/dl/648/378215.html
单片机开发
The XC226x derivatives are high-performance members of the Infineon XC2000 Family of full-feature s
The XC226x derivatives are high-performance members of the Infineon XC2000 Family
of full-feature single-chip CMOS microcontrollers. These devices extend the functionality
and performance of the C166 Family in terms of instructions (MAC unit), peripherals, and
speed. They combine ...
https://www.eeworm.com/dl/867870.html
技术资料
fujitsu flash mcu Programmer
富士通芯片程序下载上传软件：
[MB90F334]
DownloadFile=m_flash.334
LoadAddress=0x190
StartAddress=0xF90000
EndAddress=0xFFFFFF
FlashSize=0x60000
Clock=6MHz
Baud=19200
Baud2=115200
[MB90F337]
DownloadFile=m_flash.337
LoadAddress=0x190
StartAddress=0xFF0000
EndAddress=0xFFFFFF
Flash ...
https://www.eeworm.com/dl/663/170107.html
VHDL/FPGA/Verilog
Simple I2C controller -- 1) No multimaster -- 2) No slave mode -- 3) No fifo s -- -- notes:
Simple I2C controller
-- 1) No multimaster
-- 2) No slave mode
-- 3) No fifo s
--
-- notes:
-- Every command is acknowledged. Do not set a new command before previous is acknowledged.
-- Dout is available 1 clock cycle later as cmd_ack
https://www.eeworm.com/dl/534/315867.html
其他
This assignment requires you to complete the dynamic drawing components of the Date/Time Control Pan
This assignment requires you to complete the dynamic drawing components of the Date/Time Control Panel from the previous two programming assignments. In particular, you will be moving the map found in the "Time Zone" tab when the time zone changes and will be drawing a clock face ...
https://www.eeworm.com/dl/663/234380.html
VHDL/FPGA/Verilog
To increase simulation speed, ModelSim® can apply a variety of optimizations to your design. Thes
To increase simulation speed, ModelSim&reg can apply a variety of optimizations to your design. These include, but are not limited to, mergingprocesses, pulling constants out of loops, clock suppression, and signal collapsing. You control the level of optimization by specifying c ...
https://www.eeworm.com/dl/629/283929.html
磁盘编程
小而全的软盘镜像文件
小而全的软盘镜像文件，原创！fbdisk-坏道屏蔽；clock-时钟显示；支持DOS下USB，快速分区；杀进程killer.exe gdisk-最好的分区工具，方法见fd.txt。
https://www.eeworm.com/dl/968328.html
技术资料
AN3133
使用STM8L15x/STM8L16x的实时时钟(RTC)
(Using the STM8L15x/STM8L16x real-time clock (RTC))
https://www.eeworm.com/dl/502/29063.html
单片机编程
C8051F020
HIGH SPEED 8051 μC CORE
- Pipe-lined Instruction Architecture; Executes 70% of Instructions in 1 or 2
System Clocks
- Up to 25MIPS Throughput with 25MHz System Clock
- 22 Vectored Interrupt Sources
MEMORY
- 4352 Bytes Internal Data RAM (256 + 4k)
- 64k Bytes In-System ...
https://www.eeworm.com/dl/fpga/doc/32600.html
教程资料
XAPP806 -决定DDR反馈时钟的最佳DCM相移
This application note describes how to build a system that can be used for determining theoptimal phase shift for a Double Data Rate (DDR) memory feedback clock. In this system, theDDR memory is controlled by a controller that attaches to either the OPB or PLB and is used inan ...