adc_seg8_display_vhd.sdo

VHDLADC数码管动态扫描.rar

// Copyright (C) 1991-2007 Altera Corporation
// Your use of Altera Corporation's design tools, logic functions 
// and other software and tools, and its AMPP partner logic 
// functions, and any output files from any of the foregoing 
// (including device programming or simulation files), and any 
// associated documentation or information are expressly subject 
// to the terms and conditions of the Altera Program License 
// Subscription Agreement, Altera MegaCore Function License 
// Agreement, or other applicable license agreement, including, 
// without limitation, that your use is for the sole purpose of 
// programming logic devices manufactured by Altera and sold by 
// Altera or its authorized distributors.  Please refer to the 
// applicable agreement for further details.


// 
// Device: Altera EPM7128SQC100-15 Package PQFP100
// 

// 
// This SDF file should be used for ModelSim (VHDL) only
// 

(DELAYFILE
  (SDFVERSION "2.1")
  (DESIGN "ADC_SEG8_DISPLAY")
  (DATE "04/14/2010 19:34:43")
  (VENDOR "Altera")
  (PROGRAM "Quartus II")
  (VERSION "Version 7.1 Build 156 04/30/2007 SJ Full Version")
  (DIVIDER .)
  (TIMESCALE 1 ps)

  (CELL
    (CELLTYPE "max_asynch_io")
    (INSTANCE \\CLK\~I\\.asynch_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH padio dataout (3000:3000:3000) (3000:3000:3000))
      )
    )
  )
  (CELL
    (CELLTYPE "max_asynch_mcell")
    (INSTANCE \\inst3\|current_state\.state_bit_1\\.pcom)
    (DELAY
      (ABSOLUTE
        (PORT pterm1[0] (2000:2000:2000) (2000:2000:2000))
        (IOPATH pterm1[0] regin (6000:6000:6000) (6000:6000:6000))
        (IOPATH fbkin regin (8000:8000:8000) (8000:8000:8000))
      )
    )
  )
  (CELL
    (CELLTYPE "max_mcell_register")
    (INSTANCE \\inst3\|current_state\.state_bit_1\\.preg)
    (DELAY
      (ABSOLUTE
        (PORT clk (0:0:0) (0:0:0))
        (IOPATH (posedge clk) regout (1000:1000:1000) (1000:1000:1000))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (4000:4000:4000))
      (HOLD datain (posedge clk) (4000:4000:4000))
    )
  )
  (CELL
    (CELLTYPE "max_asynch_mcell")
    (INSTANCE \\inst3\|current_state\.state_bit_2\\.pcom)
    (DELAY
      (ABSOLUTE
        (PORT pterm1[0] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm1[1] (2000:2000:2000) (2000:2000:2000))
        (IOPATH pterm1[0] regin (6000:6000:6000) (6000:6000:6000))
        (IOPATH pterm1[1] regin (6000:6000:6000) (6000:6000:6000))
        (IOPATH fbkin regin (8000:8000:8000) (8000:8000:8000))
      )
    )
  )
  (CELL
    (CELLTYPE "max_mcell_register")
    (INSTANCE \\inst3\|current_state\.state_bit_2\\.preg)
    (DELAY
      (ABSOLUTE
        (PORT clk (0:0:0) (0:0:0))
        (IOPATH (posedge clk) regout (1000:1000:1000) (1000:1000:1000))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (4000:4000:4000))
      (HOLD datain (posedge clk) (4000:4000:4000))
    )
  )
  (CELL
    (CELLTYPE "max_asynch_io")
    (INSTANCE \\EOC\~I\\.asynch_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH padio dataout (2000:2000:2000) (2000:2000:2000))
      )
    )
  )
  (CELL
    (CELLTYPE "max_asynch_mcell")
    (INSTANCE \\inst3\|current_state\.state_bit_0\\.pcom)
    (DELAY
      (ABSOLUTE
        (PORT pterm1[0] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm1[1] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm1[2] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm2[0] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm2[1] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm2[2] (2000:2000:2000) (2000:2000:2000))
        (IOPATH pterm1[0] regin (6000:6000:6000) (6000:6000:6000))
        (IOPATH pterm1[1] regin (6000:6000:6000) (6000:6000:6000))
        (IOPATH pterm1[2] regin (6000:6000:6000) (6000:6000:6000))
        (IOPATH pterm2[0] regin (6000:6000:6000) (6000:6000:6000))
        (IOPATH pterm2[1] regin (6000:6000:6000) (6000:6000:6000))
        (IOPATH pterm2[2] regin (6000:6000:6000) (6000:6000:6000))
        (IOPATH fbkin regin (8000:8000:8000) (8000:8000:8000))
      )
    )
  )
  (CELL
    (CELLTYPE "max_mcell_register")
    (INSTANCE \\inst3\|current_state\.state_bit_0\\.preg)
    (DELAY
      (ABSOLUTE
        (PORT clk (0:0:0) (0:0:0))
        (IOPATH (posedge clk) regout (1000:1000:1000) (1000:1000:1000))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (4000:4000:4000))
      (HOLD datain (posedge clk) (4000:4000:4000))
    )
  )
  (CELL
    (CELLTYPE "max_asynch_mcell")
    (INSTANCE \\inst3\|current_state\.st1\~24\\.pcom)
    (DELAY
      (ABSOLUTE
        (PORT pterm1[0] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm1[1] (2000:2000:2000) (2000:2000:2000))
        (IOPATH pterm1[0] combout (7000:7000:7000) (7000:7000:7000))
        (IOPATH pterm1[1] combout (7000:7000:7000) (7000:7000:7000))
      )
    )
  )
  (CELL
    (CELLTYPE "max_asynch_mcell")
    (INSTANCE \\inst\|CNT\[0\]\\.pcom)
    (DELAY
      (ABSOLUTE
        (IOPATH fbkin regin (8000:8000:8000) (8000:8000:8000))
      )
    )
  )
  (CELL
    (CELLTYPE "max_mcell_register")
    (INSTANCE \\inst\|CNT\[0\]\\.preg)
    (DELAY
      (ABSOLUTE
        (PORT clk (0:0:0) (0:0:0))
        (IOPATH (posedge clk) regout (1000:1000:1000) (1000:1000:1000))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (4000:4000:4000))
      (HOLD datain (posedge clk) (4000:4000:4000))
    )
  )
  (CELL
    (CELLTYPE "max_asynch_mcell")
    (INSTANCE \\inst\|CNT\[1\]\\.pcom)
    (DELAY
      (ABSOLUTE
        (PORT pterm1[0] (2000:2000:2000) (2000:2000:2000))
        (IOPATH pterm1[0] regin (6000:6000:6000) (6000:6000:6000))
        (IOPATH fbkin regin (8000:8000:8000) (8000:8000:8000))
      )
    )
  )
  (CELL
    (CELLTYPE "max_mcell_register")
    (INSTANCE \\inst\|CNT\[1\]\\.preg)
    (DELAY
      (ABSOLUTE
        (PORT clk (0:0:0) (0:0:0))
        (IOPATH (posedge clk) regout (1000:1000:1000) (1000:1000:1000))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (4000:4000:4000))
      (HOLD datain (posedge clk) (4000:4000:4000))
    )
  )
  (CELL
    (CELLTYPE "max_asynch_mcell")
    (INSTANCE \\inst\|Mux28\~21\\.pcom)
    (DELAY
      (ABSOLUTE
        (PORT pterm1[0] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm1[1] (2000:2000:2000) (2000:2000:2000))
        (IOPATH pterm1[0] combout (7000:7000:7000) (7000:7000:7000))
        (IOPATH pterm1[1] combout (7000:7000:7000) (7000:7000:7000))
      )
    )
  )
  (CELL
    (CELLTYPE "max_asynch_mcell")
    (INSTANCE \\inst\|Mux28\~25\\.pcom)
    (DELAY
      (ABSOLUTE
        (PORT pterm1[0] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm1[1] (2000:2000:2000) (2000:2000:2000))
        (IOPATH pterm1[0] combout (7000:7000:7000) (7000:7000:7000))
        (IOPATH pterm1[1] combout (7000:7000:7000) (7000:7000:7000))
      )
    )
  )
  (CELL
    (CELLTYPE "max_asynch_mcell")
    (INSTANCE \\inst\|Mux30\~36\\.pcom)
    (DELAY
      (ABSOLUTE
        (PORT pterm1[0] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm1[1] (2000:2000:2000) (2000:2000:2000))
        (IOPATH pterm1[0] combout (7000:7000:7000) (7000:7000:7000))
        (IOPATH pterm1[1] combout (7000:7000:7000) (7000:7000:7000))
      )
    )
  )
  (CELL
    (CELLTYPE "max_asynch_mcell")
    (INSTANCE \\inst\|Mux23\~299\\.pcom)
    (DELAY
      (ABSOLUTE
        (PORT pterm1[0] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm1[1] (2000:2000:2000) (2000:2000:2000))
        (IOPATH pterm1[0] combout (7000:7000:7000) (7000:7000:7000))
        (IOPATH pterm1[1] combout (7000:7000:7000) (7000:7000:7000))
      )
    )
  )
  (CELL
    (CELLTYPE "max_asynch_mcell")
    (INSTANCE \\inst3\|current_state\.st1\~26\\.pcom)
    (DELAY
      (ABSOLUTE
        (PORT pterm1[0] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm1[1] (2000:2000:2000) (2000:2000:2000))
        (IOPATH pterm1[0] combout (7000:7000:7000) (7000:7000:7000))
        (IOPATH pterm1[1] combout (7000:7000:7000) (7000:7000:7000))
      )
    )
  )
  (CELL
    (CELLTYPE "max_asynch_mcell")
    (INSTANCE \\inst3\|OE\~6\\.pcom)
    (DELAY
      (ABSOLUTE
        (PORT pterm1[0] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm1[1] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm2[0] (2000:2000:2000) (2000:2000:2000))
        (IOPATH pterm1[0] combout (7000:7000:7000) (7000:7000:7000))
        (IOPATH pterm1[1] combout (7000:7000:7000) (7000:7000:7000))
        (IOPATH pterm2[0] combout (7000:7000:7000) (7000:7000:7000))
      )
    )
  )
  (CELL
    (CELLTYPE "max_asynch_mcell")
    (INSTANCE \\inst\|Mux22\~20\\.pcom)
    (DELAY
      (ABSOLUTE
        (PORT pterm1[0] (2000:2000:2000) (2000:2000:2000))
        (PORT pterm1[1] (2000:2000:2000) (2000:2000:2000))
        (IOPATH pterm1[0] combout (7000:7000:7000) (7000:7000:7000))
        (IOPATH pterm1[1] combout (7000:7000:7000) (7000:7000:7000))
      )
    )
  )